diff options
author | Joy Lee <chang.li@westberrytech.com> | 2021-11-27 06:28:18 +0800 |
---|---|---|
committer | GitHub <noreply@github.com> | 2021-11-27 09:28:18 +1100 |
commit | 68838bb700413144c6fdaf680f3d412b8231b584 (patch) | |
tree | 771e7fea9bc145c9e833ac66dcb712af9b55e532 /platforms/chibios/drivers | |
parent | b04f66f2452494206673323c9495ea6a56c0cb06 (diff) |
Westberrytech pr (#14422)
* Added support for WB32 MCU
* Modified eeprom_wb32.c
* Remove the eeprom_wb32-related code
Diffstat (limited to 'platforms/chibios/drivers')
-rw-r--r-- | platforms/chibios/drivers/i2c_master.c | 3 | ||||
-rw-r--r-- | platforms/chibios/drivers/spi_master.c | 33 | ||||
-rw-r--r-- | platforms/chibios/drivers/uart.c | 4 | ||||
-rw-r--r-- | platforms/chibios/drivers/uart.h | 16 |
4 files changed, 56 insertions, 0 deletions
diff --git a/platforms/chibios/drivers/i2c_master.c b/platforms/chibios/drivers/i2c_master.c index 63e85ae87d..43591d56f8 100644 --- a/platforms/chibios/drivers/i2c_master.c +++ b/platforms/chibios/drivers/i2c_master.c @@ -38,6 +38,9 @@ static const I2CConfig i2cconfig = { I2C1_OPMODE, I2C1_CLOCK_SPEED, I2C1_DUTY_CYCLE, +#elif defined(WB32F3G71xx) + I2C1_OPMODE, + I2C1_CLOCK_SPEED, #else // This configures the I2C clock to 400khz assuming a 72Mhz clock // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html diff --git a/platforms/chibios/drivers/spi_master.c b/platforms/chibios/drivers/spi_master.c index c592369dde..dde0bb0597 100644 --- a/platforms/chibios/drivers/spi_master.c +++ b/platforms/chibios/drivers/spi_master.c @@ -54,6 +54,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { return false; } +#ifndef WB32F3G71xx uint16_t roundedDivisor = 2; while (roundedDivisor < divisor) { roundedDivisor <<= 1; @@ -62,6 +63,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { if (roundedDivisor < 2 || roundedDivisor > 256) { return false; } +#endif #if defined(K20x) || defined(KL2x) spiConfig.tar0 = SPIx_CTARn_FMSZ(7) | SPIx_CTARn_ASC(1); @@ -135,6 +137,37 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { } spiConfig.cpr = (roundedDivisor - 1) >> 1; + +#elif defined(WB32F3G71xx) + if (!lsbFirst) { + osalDbgAssert(lsbFirst != FALSE, "unsupported lsbFirst"); + } + + if (divisor < 1) { + return false; + } + + spiConfig.SPI_BaudRatePrescaler = (divisor << 2); + + switch (mode) { + case 0: + spiConfig.SPI_CPHA = SPI_CPHA_1Edge; + spiConfig.SPI_CPOL = SPI_CPOL_Low; + break; + case 1: + spiConfig.SPI_CPHA = SPI_CPHA_2Edge; + spiConfig.SPI_CPOL = SPI_CPOL_Low; + break; + case 2: + spiConfig.SPI_CPHA = SPI_CPHA_1Edge; + spiConfig.SPI_CPOL = SPI_CPOL_High; + break; + case 3: + spiConfig.SPI_CPHA = SPI_CPHA_2Edge; + spiConfig.SPI_CPOL = SPI_CPOL_High; + break; + } + #else spiConfig.cr1 = 0; diff --git a/platforms/chibios/drivers/uart.c b/platforms/chibios/drivers/uart.c index 297c1892c3..d2ea5d6415 100644 --- a/platforms/chibios/drivers/uart.c +++ b/platforms/chibios/drivers/uart.c @@ -18,7 +18,11 @@ #include "quantum.h" +#if defined(WB32F3G71xx) +static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_WRDLEN, SD1_STPBIT, SD1_PARITY, SD1_ATFLCT}; +#else static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3}; +#endif void uart_init(uint32_t baud) { static bool is_initialised = false; diff --git a/platforms/chibios/drivers/uart.h b/platforms/chibios/drivers/uart.h index 5bc4875901..603d51037b 100644 --- a/platforms/chibios/drivers/uart.h +++ b/platforms/chibios/drivers/uart.h @@ -68,6 +68,22 @@ # define SD1_CR3 0 #endif +#ifndef SD1_WRDLEN +# define SD1_WRDLEN 3 +#endif + +#ifndef SD1_STPBIT +# define SD1_STPBIT 0 +#endif + +#ifndef SD1_PARITY +# define SD1_PARITY 0 +#endif + +#ifndef SD1_ATFLCT +# define SD1_ATFLCT 0 +#endif + void uart_init(uint32_t baud); void uart_write(uint8_t data); |