diff options
author | skullY <skullydazed@gmail.com> | 2019-08-30 11:19:03 -0700 |
---|---|---|
committer | skullydazed <skullydazed@users.noreply.github.com> | 2019-08-30 15:01:52 -0700 |
commit | b624f32f944acdc59dcb130674c09090c5c404cb (patch) | |
tree | bc13adbba137d122d9a2c2fb2fafcbb08ac10e25 /drivers/arm | |
parent | 61af76a10d00aba185b8338604171de490a13e3b (diff) |
clang-format changes
Diffstat (limited to 'drivers/arm')
-rw-r--r-- | drivers/arm/i2c_master.c | 121 | ||||
-rw-r--r-- | drivers/arm/i2c_master.h | 91 |
2 files changed, 98 insertions, 114 deletions
diff --git a/drivers/arm/i2c_master.c b/drivers/arm/i2c_master.c index cba5a1c679..18068d3a6d 100644 --- a/drivers/arm/i2c_master.c +++ b/drivers/arm/i2c_master.c @@ -34,98 +34,83 @@ static uint8_t i2c_address; static const I2CConfig i2cconfig = { #ifdef USE_I2CV1 - I2C1_OPMODE, - I2C1_CLOCK_SPEED, - I2C1_DUTY_CYCLE, + I2C1_OPMODE, + I2C1_CLOCK_SPEED, + I2C1_DUTY_CYCLE, #else - STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | - STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | - STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), - 0, - 0 + STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0 #endif }; static i2c_status_t chibios_to_qmk(const msg_t* status) { - switch (*status) { - case I2C_NO_ERROR: - return I2C_STATUS_SUCCESS; - case I2C_TIMEOUT: - return I2C_STATUS_TIMEOUT; - // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT - default: - return I2C_STATUS_ERROR; - } + switch (*status) { + case I2C_NO_ERROR: + return I2C_STATUS_SUCCESS; + case I2C_TIMEOUT: + return I2C_STATUS_TIMEOUT; + // I2C_BUS_ERROR, I2C_ARBITRATION_LOST, I2C_ACK_FAILURE, I2C_OVERRUN, I2C_PEC_ERROR, I2C_SMB_ALERT + default: + return I2C_STATUS_ERROR; + } } -__attribute__ ((weak)) -void i2c_init(void) -{ - // Try releasing special pins for a short time - palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT); - palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT); +__attribute__((weak)) void i2c_init(void) { + // Try releasing special pins for a short time + palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_INPUT); + palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_INPUT); - chThdSleepMilliseconds(10); + chThdSleepMilliseconds(10); #ifdef USE_I2CV1 - palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); - palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); #else - palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); - palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); + palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); + palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); #endif - //i2cInit(); //This is invoked by halInit() so no need to redo it. + // i2cInit(); //This is invoked by halInit() so no need to redo it. } -i2c_status_t i2c_start(uint8_t address) -{ - i2c_address = address; - i2cStart(&I2C_DRIVER, &i2cconfig); - return I2C_STATUS_SUCCESS; +i2c_status_t i2c_start(uint8_t address) { + i2c_address = address; + i2cStart(&I2C_DRIVER, &i2cconfig); + return I2C_STATUS_SUCCESS; } -i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) -{ - i2c_address = address; - i2cStart(&I2C_DRIVER, &i2cconfig); - msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, MS2ST(timeout)); - return chibios_to_qmk(&status); +i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) { + i2c_address = address; + i2cStart(&I2C_DRIVER, &i2cconfig); + msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, MS2ST(timeout)); + return chibios_to_qmk(&status); } -i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) -{ - i2c_address = address; - i2cStart(&I2C_DRIVER, &i2cconfig); - msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, MS2ST(timeout)); - return chibios_to_qmk(&status); +i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) { + i2c_address = address; + i2cStart(&I2C_DRIVER, &i2cconfig); + msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, MS2ST(timeout)); + return chibios_to_qmk(&status); } -i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) -{ - i2c_address = devaddr; - i2cStart(&I2C_DRIVER, &i2cconfig); +i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) { + i2c_address = devaddr; + i2cStart(&I2C_DRIVER, &i2cconfig); - uint8_t complete_packet[length + 1]; - for(uint8_t i = 0; i < length; i++) - { - complete_packet[i+1] = data[i]; - } - complete_packet[0] = regaddr; + uint8_t complete_packet[length + 1]; + for (uint8_t i = 0; i < length; i++) { + complete_packet[i + 1] = data[i]; + } + complete_packet[0] = regaddr; - msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, MS2ST(timeout)); - return chibios_to_qmk(&status); + msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, MS2ST(timeout)); + return chibios_to_qmk(&status); } -i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) -{ - i2c_address = devaddr; - i2cStart(&I2C_DRIVER, &i2cconfig); - msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, MS2ST(timeout)); - return chibios_to_qmk(&status); +i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) { + i2c_address = devaddr; + i2cStart(&I2C_DRIVER, &i2cconfig); + msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), ®addr, 1, data, length, MS2ST(timeout)); + return chibios_to_qmk(&status); } -void i2c_stop(void) -{ - i2cStop(&I2C_DRIVER); -} +void i2c_stop(void) { i2cStop(&I2C_DRIVER); } diff --git a/drivers/arm/i2c_master.h b/drivers/arm/i2c_master.h index c8afa31e28..b40fa0a910 100644 --- a/drivers/arm/i2c_master.h +++ b/drivers/arm/i2c_master.h @@ -27,84 +27,83 @@ #include "ch.h" #include <hal.h> - #if defined(STM32F1XX) || defined(STM32F1xx) || defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx) - #define USE_I2CV1 +# define USE_I2CV1 #endif #ifdef I2C1_BANK - #define I2C1_SCL_BANK I2C1_BANK - #define I2C1_SDA_BANK I2C1_BANK +# define I2C1_SCL_BANK I2C1_BANK +# define I2C1_SDA_BANK I2C1_BANK #endif #ifndef I2C1_SCL_BANK - #define I2C1_SCL_BANK GPIOB +# define I2C1_SCL_BANK GPIOB #endif #ifndef I2C1_SDA_BANK - #define I2C1_SDA_BANK GPIOB +# define I2C1_SDA_BANK GPIOB #endif #ifndef I2C1_SCL - #define I2C1_SCL 6 +# define I2C1_SCL 6 #endif #ifndef I2C1_SDA - #define I2C1_SDA 7 +# define I2C1_SDA 7 #endif #ifdef USE_I2CV1 - #ifndef I2C1_OPMODE - #define I2C1_OPMODE OPMODE_I2C - #endif - #ifndef I2C1_CLOCK_SPEED - #define I2C1_CLOCK_SPEED 100000 /* 400000 */ - #endif - #ifndef I2C1_DUTY_CYCLE - #define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */ - #endif +# ifndef I2C1_OPMODE +# define I2C1_OPMODE OPMODE_I2C +# endif +# ifndef I2C1_CLOCK_SPEED +# define I2C1_CLOCK_SPEED 100000 /* 400000 */ +# endif +# ifndef I2C1_DUTY_CYCLE +# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */ +# endif #else - // The default PAL alternate modes are used to signal that the pins are used for I2C - #ifndef I2C1_SCL_PAL_MODE - #define I2C1_SCL_PAL_MODE 4 - #endif - #ifndef I2C1_SDA_PAL_MODE - #define I2C1_SDA_PAL_MODE 4 - #endif +// The default PAL alternate modes are used to signal that the pins are used for I2C +# ifndef I2C1_SCL_PAL_MODE +# define I2C1_SCL_PAL_MODE 4 +# endif +# ifndef I2C1_SDA_PAL_MODE +# define I2C1_SDA_PAL_MODE 4 +# endif - // The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock - // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html - #ifndef I2C1_TIMINGR_PRESC - #define I2C1_TIMINGR_PRESC 15U - #endif - #ifndef I2C1_TIMINGR_SCLDEL - #define I2C1_TIMINGR_SCLDEL 4U - #endif - #ifndef I2C1_TIMINGR_SDADEL - #define I2C1_TIMINGR_SDADEL 2U - #endif - #ifndef I2C1_TIMINGR_SCLH - #define I2C1_TIMINGR_SCLH 15U - #endif - #ifndef I2C1_TIMINGR_SCLL - #define I2C1_TIMINGR_SCLL 21U - #endif +// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock +// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html +# ifndef I2C1_TIMINGR_PRESC +# define I2C1_TIMINGR_PRESC 15U +# endif +# ifndef I2C1_TIMINGR_SCLDEL +# define I2C1_TIMINGR_SCLDEL 4U +# endif +# ifndef I2C1_TIMINGR_SDADEL +# define I2C1_TIMINGR_SDADEL 2U +# endif +# ifndef I2C1_TIMINGR_SCLH +# define I2C1_TIMINGR_SCLH 15U +# endif +# ifndef I2C1_TIMINGR_SCLL +# define I2C1_TIMINGR_SCLL 21U +# endif #endif #ifndef I2C_DRIVER - #define I2C_DRIVER I2CD1 +# define I2C_DRIVER I2CD1 #endif typedef int16_t i2c_status_t; #define I2C_STATUS_SUCCESS (0) -#define I2C_STATUS_ERROR (-1) +#define I2C_STATUS_ERROR (-1) #define I2C_STATUS_TIMEOUT (-2) -void i2c_init(void); +void i2c_init(void); i2c_status_t i2c_start(uint8_t address); i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout); i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout); -i2c_status_t i2c_transmit_receive(uint8_t address, uint8_t * tx_body, uint16_t tx_length, uint8_t * rx_body, uint16_t rx_length); +i2c_status_t i2c_transmit_receive(uint8_t address, uint8_t* tx_body, uint16_t tx_length, uint8_t* rx_body, uint16_t rx_length); i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout); i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout); -void i2c_stop(void); +void i2c_stop(void); |