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authorNick Brassel <nick@tzarc.org>2021-06-30 10:07:40 +1000
committerGitHub <noreply@github.com>2021-06-30 10:07:40 +1000
commit8bb231aa1c40a7c6b6fdd229e88ef79c3fa930e2 (patch)
treec862a6538987482a79ccef3a2296d3250006e847
parent85965043613a0674b782cefd1ed9ccc6b9cc90a8 (diff)
Adds support for STM32L412xB, STM32L422xB. (#13383)
* Adds support for STM32L412xB, STM32L422xB. * Add to list of supported MCUs. * Disable SPI1 by default.
-rw-r--r--data/schemas/keyboard.jsonschema2
-rw-r--r--docs/compatible_microcontrollers.md2
-rw-r--r--docs/ja/compatible_microcontrollers.md2
-rw-r--r--lib/python/qmk/constants.py2
-rw-r--r--platforms/chibios/GENERIC_STM32_L412XB/board/board.mk9
-rw-r--r--platforms/chibios/GENERIC_STM32_L412XB/configs/board.h24
-rw-r--r--platforms/chibios/GENERIC_STM32_L412XB/configs/config.h26
-rw-r--r--platforms/chibios/GENERIC_STM32_L412XB/configs/mcuconf.h282
-rw-r--r--platforms/chibios/GENERIC_STM32_L433XC/configs/board.h2
-rw-r--r--platforms/chibios/common/ld/STM32L412xB.ld85
-rw-r--r--quantum/mcu_selection.mk34
11 files changed, 467 insertions, 3 deletions
diff --git a/data/schemas/keyboard.jsonschema b/data/schemas/keyboard.jsonschema
index d6d33ce4ec..3a77b20678 100644
--- a/data/schemas/keyboard.jsonschema
+++ b/data/schemas/keyboard.jsonschema
@@ -13,7 +13,7 @@
},
"processor": {
"type": "string",
- "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66F18", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L433", "STM32L443", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
+ "enum": ["cortex-m0", "cortex-m0plus", "cortex-m3", "cortex-m4", "MKL26Z64", "MK20DX128", "MK20DX256", "MK66F18", "STM32F042", "STM32F072", "STM32F103", "STM32F303", "STM32F401", "STM32F411", "STM32F446", "STM32G431", "STM32G474", "STM32L412", "STM32L422", "STM32L433", "STM32L443", "atmega16u2", "atmega32u2", "atmega16u4", "atmega32u4", "at90usb162", "at90usb646", "at90usb647", "at90usb1286", "at90usb1287", "atmega32a", "atmega328p", "atmega328", "attiny85", "unknown"]
},
"board": {
"type": "string",
diff --git a/docs/compatible_microcontrollers.md b/docs/compatible_microcontrollers.md
index 0f5b140de0..865b29feec 100644
--- a/docs/compatible_microcontrollers.md
+++ b/docs/compatible_microcontrollers.md
@@ -31,6 +31,8 @@ You can also use any ARM chip with USB that [ChibiOS](https://www.chibios.org) s
* [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)
* [STM32G431](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x1.html)
* [STM32G474](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x4.html)
+ * [STM32L412](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x2.html)
+ * [STM32L422](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x2.html)
* [STM32L433](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
* [STM32L443](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
diff --git a/docs/ja/compatible_microcontrollers.md b/docs/ja/compatible_microcontrollers.md
index b675b038d2..761a4cda46 100644
--- a/docs/ja/compatible_microcontrollers.md
+++ b/docs/ja/compatible_microcontrollers.md
@@ -36,6 +36,8 @@ QMK は十分な容量のフラッシュメモリを備えた USB 対応 AVR ま
* [STM32F446](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html)
* [STM32G431](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x1.html)
* [STM32G474](https://www.st.com/en/microcontrollers-microprocessors/stm32g4x4.html)
+* [STM32L412](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x2.html)
+* [STM32L422](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x2.html)
* [STM32L433](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
* [STM32L443](https://www.st.com/en/microcontrollers-microprocessors/stm32l4x3.html)
diff --git a/lib/python/qmk/constants.py b/lib/python/qmk/constants.py
index 49e5e0eb42..be5ce5d4ed 100644
--- a/lib/python/qmk/constants.py
+++ b/lib/python/qmk/constants.py
@@ -10,7 +10,7 @@ QMK_FIRMWARE = Path.cwd()
MAX_KEYBOARD_SUBFOLDERS = 5
# Supported processor types
-CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66F18', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L433', 'STM32L443'
+CHIBIOS_PROCESSORS = 'cortex-m0', 'cortex-m0plus', 'cortex-m3', 'cortex-m4', 'MKL26Z64', 'MK20DX128', 'MK20DX256', 'MK66F18', 'STM32F042', 'STM32F072', 'STM32F103', 'STM32F303', 'STM32F401', 'STM32F411', 'STM32F446', 'STM32G431', 'STM32G474', 'STM32L412', 'STM32L422', 'STM32L433', 'STM32L443'
LUFA_PROCESSORS = 'at90usb162', 'atmega16u2', 'atmega32u2', 'atmega16u4', 'atmega32u4', 'at90usb646', 'at90usb647', 'at90usb1286', 'at90usb1287', None
VUSB_PROCESSORS = 'atmega32a', 'atmega328p', 'atmega328', 'attiny85'
diff --git a/platforms/chibios/GENERIC_STM32_L412XB/board/board.mk b/platforms/chibios/GENERIC_STM32_L412XB/board/board.mk
new file mode 100644
index 0000000000..1250385eb8
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_L412XB/board/board.mk
@@ -0,0 +1,9 @@
+# List of all the board related files.
+BOARDSRC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L432KC/board.c
+
+# Required include directories
+BOARDINC = $(CHIBIOS)/os/hal/boards/ST_NUCLEO32_L432KC
+
+# Shared variables
+ALLCSRC += $(BOARDSRC)
+ALLINC += $(BOARDINC)
diff --git a/platforms/chibios/GENERIC_STM32_L412XB/configs/board.h b/platforms/chibios/GENERIC_STM32_L412XB/configs/board.h
new file mode 100644
index 0000000000..2e37d95fe3
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_L412XB/configs/board.h
@@ -0,0 +1,24 @@
+/* Copyright 2018-2021 Harrison Chan (@Xelus)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <https://www.gnu.org/licenses/>.
+ */
+#pragma once
+
+#include_next "board.h"
+
+#undef STM32L432xx
+
+// Pretend that we're an L443xx as the ChibiOS definitions for L4x2/L4x3 mistakenly don't enable GPIOH, I2C2, or SPI2.
+// Until ChibiOS upstream is fixed, this should be kept at L443, as nothing in QMK currently utilises the crypto peripheral on the L443.
+#define STM32L443xx
diff --git a/platforms/chibios/GENERIC_STM32_L412XB/configs/config.h b/platforms/chibios/GENERIC_STM32_L412XB/configs/config.h
new file mode 100644
index 0000000000..c27c61b19a
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_L412XB/configs/config.h
@@ -0,0 +1,26 @@
+/* Copyright 2018-2021 Harrison Chan (@Xelus)
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* Address for jumping to bootloader on STM32 chips. */
+/* It is chip dependent, the correct number can be looked up by checking against ST's application note AN2606.
+ */
+#define STM32_BOOTLOADER_ADDRESS 0x1FFF0000
+
+#define PAL_STM32_OSPEED_HIGHEST PAL_STM32_OSPEED_HIGH
+
+#ifndef EARLY_INIT_PERFORM_BOOTLOADER_JUMP
+# define EARLY_INIT_PERFORM_BOOTLOADER_JUMP TRUE
+#endif
diff --git a/platforms/chibios/GENERIC_STM32_L412XB/configs/mcuconf.h b/platforms/chibios/GENERIC_STM32_L412XB/configs/mcuconf.h
new file mode 100644
index 0000000000..8ad5a8da21
--- /dev/null
+++ b/platforms/chibios/GENERIC_STM32_L412XB/configs/mcuconf.h
@@ -0,0 +1,282 @@
+/*
+ ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * STM32L4xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+#define STM32L4xx_MCUCONF
+#define STM32L412_MCUCONF
+#define STM32L422_MCUCONF
+#define STM32L432_MCUCONF
+#define STM32L433_MCUCONF
+#define STM32L442_MCUCONF
+#define STM32L443_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT FALSE
+#define STM32_VOS STM32_VOS_RANGE1
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
+#define STM32_HSI16_ENABLED TRUE
+#define STM32_HSI48_ENABLED TRUE
+#define STM32_LSI_ENABLED FALSE
+#define STM32_HSE_ENABLED FALSE
+#define STM32_LSE_ENABLED FALSE
+#define STM32_MSIPLL_ENABLED FALSE
+#define STM32_ADC_CLOCK_ENABLED TRUE
+#define STM32_USB_CLOCK_ENABLED TRUE
+#define STM32_SAI1_CLOCK_ENABLED TRUE
+#define STM32_SAI2_CLOCK_ENABLED TRUE
+#define STM32_MSIRANGE STM32_MSIRANGE_4M
+#define STM32_MSISRANGE STM32_MSISRANGE_4M
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_HSI16
+#define STM32_PLLM_VALUE 4
+#define STM32_PLLN_VALUE 80
+#define STM32_PLLP_VALUE 7
+#define STM32_PLLQ_VALUE 4
+#define STM32_PLLR_VALUE 4
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV1
+#define STM32_PPRE2 STM32_PPRE2_DIV1
+#define STM32_STOPWUCK STM32_STOPWUCK_MSI
+#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
+#define STM32_MCOPRE STM32_MCOPRE_DIV1
+#define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK
+#define STM32_PLLSAI1N_VALUE 72
+#define STM32_PLLSAI1P_VALUE 7
+#define STM32_PLLSAI1Q_VALUE 6
+#define STM32_PLLSAI1R_VALUE 6
+#define STM32_PLLSAI2N_VALUE 72
+#define STM32_PLLSAI2P_VALUE 7
+#define STM32_PLLSAI2R_VALUE 6
+
+/*
+ * Peripherals clock sources.
+ */
+#define STM32_USART1SEL STM32_USART1SEL_SYSCLK
+#define STM32_USART2SEL STM32_USART2SEL_SYSCLK
+#define STM32_USART3SEL STM32_USART3SEL_SYSCLK
+#define STM32_UART4SEL STM32_UART4SEL_SYSCLK
+#define STM32_UART5SEL STM32_UART5SEL_SYSCLK
+#define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK
+#define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK
+#define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK
+#define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK
+#define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1
+#define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1
+#define STM32_SAI1SEL STM32_SAI1SEL_OFF
+#define STM32_SAI2SEL STM32_SAI2SEL_OFF
+#define STM32_CLK48SEL STM32_CLK48SEL_HSI48
+#define STM32_ADCSEL STM32_ADCSEL_SYSCLK
+#define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1
+#define STM32_RTCSEL STM32_RTCSEL_LSI
+
+/*
+ * IRQ system settings.
+ */
+#define STM32_IRQ_EXTI0_PRIORITY 6
+#define STM32_IRQ_EXTI1_PRIORITY 6
+#define STM32_IRQ_EXTI2_PRIORITY 6
+#define STM32_IRQ_EXTI3_PRIORITY 6
+#define STM32_IRQ_EXTI4_PRIORITY 6
+#define STM32_IRQ_EXTI5_9_PRIORITY 6
+#define STM32_IRQ_EXTI10_15_PRIORITY 6
+#define STM32_IRQ_EXTI1635_38_PRIORITY 6
+#define STM32_IRQ_EXTI18_PRIORITY 6
+#define STM32_IRQ_EXTI19_PRIORITY 6
+#define STM32_IRQ_EXTI20_PRIORITY 6
+#define STM32_IRQ_EXTI21_22_PRIORITY 15
+
+#define STM32_IRQ_TIM1_BRK_TIM15_PRIORITY 7
+#define STM32_IRQ_TIM1_UP_TIM16_PRIORITY 7
+#define STM32_IRQ_TIM1_TRGCO_TIM17_PRIORITY 7
+#define STM32_IRQ_TIM1_CC_PRIORITY 7
+#define STM32_IRQ_TIM2_PRIORITY 7
+#define STM32_IRQ_TIM6_PRIORITY 7
+#define STM32_IRQ_TIM7_PRIORITY 7
+
+#define STM32_IRQ_USART1_PRIORITY 12
+#define STM32_IRQ_USART2_PRIORITY 12
+#define STM32_IRQ_USART3_PRIORITY 12
+#define STM32_IRQ_LPUART1_PRIORITY 12
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_COMPACT_SAMPLES FALSE
+#define STM32_ADC_USE_ADC1 FALSE
+#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC12_IRQ_PRIORITY 5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
+#define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
+#define STM32_ADC_ADC123_PRESC ADC_CCR_PRESC_DIV2
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+
+/*
+ * DAC driver system settings.
+ */
+#define STM32_DAC_DUAL_MODE FALSE
+#define STM32_DAC_USE_DAC1_CH1 FALSE
+#define STM32_DAC_USE_DAC1_CH2 FALSE
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
+#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
+#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM6 FALSE
+#define STM32_GPT_USE_TIM7 FALSE
+#define STM32_GPT_USE_TIM15 FALSE
+#define STM32_GPT_USE_TIM16 FALSE
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1 FALSE
+#define STM32_I2C_USE_I2C3 FALSE
+#define STM32_I2C_BUSY_TIMEOUT 50
+#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
+#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C1_IRQ_PRIORITY 5
+#define STM32_I2C_I2C3_IRQ_PRIORITY 5
+#define STM32_I2C_I2C1_DMA_PRIORITY 3
+#define STM32_I2C_I2C3_DMA_PRIORITY 3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM15 FALSE
+#define STM32_ICU_USE_TIM16 FALSE
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED FALSE
+#define STM32_PWM_USE_TIM1 FALSE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_USE_TIM15 FALSE
+#define STM32_PWM_USE_TIM16 FALSE
+
+/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_PRESA_VALUE 32
+#define STM32_RTC_PRESS_VALUE 1024
+#define STM32_RTC_CR_INIT 0
+#define STM32_RTC_TAMPCR_INIT 0
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 FALSE
+#define STM32_SERIAL_USE_LPUART1 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_LPUART1_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 FALSE
+#define STM32_SPI_USE_SPI3 FALSE
+#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
+#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
+#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
+#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY 8
+#define STM32_ST_USE_TIMER 2
+
+/*
+ * TRNG driver system settings.
+ */
+#define STM32_TRNG_USE_RNG1 FALSE
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 FALSE
+#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
+#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6)
+#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1 TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
+
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG FALSE
+
+/*
+ * WSPI driver system settings.
+ */
+#define STM32_WSPI_USE_QUADSPI1 FALSE
+#define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
+#define STM32_WSPI_QUADSPI1_PRESCALER_VALUE 1
+
+#endif /* MCUCONF_H */
diff --git a/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h b/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h
index 51f9724f94..2e37d95fe3 100644
--- a/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h
+++ b/platforms/chibios/GENERIC_STM32_L433XC/configs/board.h
@@ -19,6 +19,6 @@
#undef STM32L432xx
-// Pretend that we're an L443xx as the ChibiOS definitions for L432/L433 mistakenly don't enable GPIOH, I2C2, or SPI2.
+// Pretend that we're an L443xx as the ChibiOS definitions for L4x2/L4x3 mistakenly don't enable GPIOH, I2C2, or SPI2.
// Until ChibiOS upstream is fixed, this should be kept at L443, as nothing in QMK currently utilises the crypto peripheral on the L443.
#define STM32L443xx
diff --git a/platforms/chibios/common/ld/STM32L412xB.ld b/platforms/chibios/common/ld/STM32L412xB.ld
new file mode 100644
index 0000000000..5718d6bc71
--- /dev/null
+++ b/platforms/chibios/common/ld/STM32L412xB.ld
@@ -0,0 +1,85 @@
+/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * STM32L412xB memory setup.
+ */
+MEMORY
+{
+ flash0 : org = 0x08000000, len = 128k
+ flash1 : org = 0x00000000, len = 0
+ flash2 : org = 0x00000000, len = 0
+ flash3 : org = 0x00000000, len = 0
+ flash4 : org = 0x00000000, len = 0
+ flash5 : org = 0x00000000, len = 0
+ flash6 : org = 0x00000000, len = 0
+ flash7 : org = 0x00000000, len = 0
+ ram0 : org = 0x20000000, len = 32k
+ ram1 : org = 0x00000000, len = 0
+ ram2 : org = 0x00000000, len = 0
+ ram3 : org = 0x00000000, len = 0
+ ram4 : org = 0x00000000, len = 0
+ ram5 : org = 0x00000000, len = 0
+ ram6 : org = 0x00000000, len = 0
+ ram7 : org = 0x00000000, len = 0
+}
+
+/* For each data/text section two region are defined, a virtual region
+ and a load region (_LMA suffix).*/
+
+/* Flash region to be used for exception vectors.*/
+REGION_ALIAS("VECTORS_FLASH", flash0);
+REGION_ALIAS("VECTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for constructors and destructors.*/
+REGION_ALIAS("XTORS_FLASH", flash0);
+REGION_ALIAS("XTORS_FLASH_LMA", flash0);
+
+/* Flash region to be used for code text.*/
+REGION_ALIAS("TEXT_FLASH", flash0);
+REGION_ALIAS("TEXT_FLASH_LMA", flash0);
+
+/* Flash region to be used for read only data.*/
+REGION_ALIAS("RODATA_FLASH", flash0);
+REGION_ALIAS("RODATA_FLASH_LMA", flash0);
+
+/* Flash region to be used for various.*/
+REGION_ALIAS("VARIOUS_FLASH", flash0);
+REGION_ALIAS("VARIOUS_FLASH_LMA", flash0);
+
+/* Flash region to be used for RAM(n) initialization data.*/
+REGION_ALIAS("RAM_INIT_FLASH_LMA", flash0);
+
+/* RAM region to be used for Main stack. This stack accommodates the processing
+ of all exceptions and interrupts.*/
+REGION_ALIAS("MAIN_STACK_RAM", ram0);
+
+/* RAM region to be used for the process stack. This is the stack used by
+ the main() function.*/
+REGION_ALIAS("PROCESS_STACK_RAM", ram0);
+
+/* RAM region to be used for data segment.*/
+REGION_ALIAS("DATA_RAM", ram0);
+REGION_ALIAS("DATA_RAM_LMA", flash0);
+
+/* RAM region to be used for BSS segment.*/
+REGION_ALIAS("BSS_RAM", ram0);
+
+/* RAM region to be used for the default heap.*/
+REGION_ALIAS("HEAP_RAM", ram0);
+
+/* Generic rules inclusion.*/
+INCLUDE rules.ld
diff --git a/quantum/mcu_selection.mk b/quantum/mcu_selection.mk
index f8def7f674..ca0accd719 100644
--- a/quantum/mcu_selection.mk
+++ b/quantum/mcu_selection.mk
@@ -433,6 +433,40 @@ ifneq (,$(filter $(MCU),STM32L433 STM32L443))
UF2_FAMILY ?= STM32L4
endif
+ifneq (,$(filter $(MCU),STM32L412 STM32L422))
+ # Cortex version
+ MCU = cortex-m4
+
+ # ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
+ ARMV = 7
+
+ ## chip/board settings
+ # - the next two should match the directories in
+ # <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
+ MCU_FAMILY = STM32
+ MCU_SERIES = STM32L4xx
+
+ # Linker script to use
+ # - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
+ # or <keyboard_dir>/ld/
+ MCU_LDSCRIPT ?= STM32L412xB
+
+ # Startup code to use
+ # - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
+ MCU_STARTUP ?= stm32l4xx
+
+ # Board: it should exist either in <chibios>/os/hal/boards/,
+ # <keyboard_dir>/boards/, or drivers/boards/
+ BOARD ?= GENERIC_STM32_L412XB
+
+ PLATFORM_NAME ?= platform_l432
+
+ USE_FPU ?= yes
+
+ # UF2 settings
+ UF2_FAMILY ?= STM32L4
+endif
+
ifneq (,$(filter $(MCU),at90usb162 atmega16u2 atmega32u2 atmega16u4 atmega32u4 at90usb646 at90usb647 at90usb1286 at90usb1287))
PROTOCOL = LUFA