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| author | Jack Humbert <jack.humb@gmail.com> | 2017-06-10 15:11:53 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2017-06-10 15:11:53 -0400 |
| commit | 4de370ccc334804519c837e4be81ec6f8e5fe54c (patch) | |
| tree | 23765d03a4b2e2b4c56824739beb21479e903bfd | |
| parent | 4092e45b6b98d590af10f4eadfd244b4a233d009 (diff) | |
Delete FUSE.txt
| -rw-r--r-- | docs/FUSE.txt | 50 |
1 files changed, 0 insertions, 50 deletions
diff --git a/docs/FUSE.txt b/docs/FUSE.txt deleted file mode 100644 index 99ddd2d186..0000000000 --- a/docs/FUSE.txt +++ /dev/null @@ -1,50 +0,0 @@ -Atmega32u4 Fuse/Lock Bits for Planck/Atomic/Preonic -========================= - - Low Fuse: 0x5E - High Fuse: 0x99 - Extended Fuse: 0xF3 - Lock Byte: 0xFF - - -ATMega168P Fuse/Lock Bits -========================= -This configuration is from usbasploader's Makefile. - - HFUSE 0xD6 - LFUSE 0xDF - EFUSE 0x00 - LOCK 0x3F(intact) - -#--------------------------------------------------------------------- -# ATMega168P -#--------------------------------------------------------------------- -# Fuse extended byte: -# 0x00 = 0 0 0 0 0 0 0 0 <-- BOOTRST (boot reset vector at 0x1800) -# \+/ -# +------- BOOTSZ (00 = 2k bytes) -# Fuse high byte: -# 0xd6 = 1 1 0 1 0 1 1 0 -# ^ ^ ^ ^ ^ \-+-/ -# | | | | | +------ BODLEVEL 0..2 (110 = 1.8 V) -# | | | | + --------- EESAVE (preserve EEPROM over chip erase) -# | | | +-------------- WDTON (if 0: watchdog always on) -# | | +---------------- SPIEN (allow serial programming) -# | +------------------ DWEN (debug wire enable) -# +-------------------- RSTDISBL (reset pin is enabled) -# Fuse low byte: -# 0xdf = 1 1 0 1 1 1 1 1 -# ^ ^ \ / \--+--/ -# | | | +------- CKSEL 3..0 (external >8M crystal) -# | | +--------------- SUT 1..0 (crystal osc, BOD enabled) -# | +------------------ CKOUT (if 0: Clock output enabled) -# +-------------------- CKDIV8 (if 0: divide by 8) - - -# Lock Bits -# 0x3f = - - 1 1 1 1 1 1 -# \ / \-/ \-/ -# | | +----- LB 2..1 (No memory lock features enabled) -# | +--------- BLB0 2..1 (No restrictions for SPM or LPM accessing the Application section) -# +--------------- BLB1 2..1 (No restrictions for SPM or LPM accessing the Boot Loader section) - |