2 files changed, 60 insertions, 60 deletions
diff --git a/platforms/chibios/drivers/i2c_master.c b/platforms/chibios/drivers/i2c_master.c
index 43591d56f8..4a5d4760d0 100644
--- a/platforms/chibios/drivers/i2c_master.c
+++ b/platforms/chibios/drivers/i2c_master.c
@@ -27,8 +27,67 @@
 #include "quantum.h"
 #include "i2c_master.h"
 #include <string.h>
+#include <ch.h>
 #include <hal.h>
 
+#ifndef I2C1_SCL_PIN
+#    define I2C1_SCL_PIN B6
+#endif
+#ifndef I2C1_SDA_PIN
+#    define I2C1_SDA_PIN B7
+#endif
+
+#ifdef USE_I2CV1
+#    ifndef I2C1_OPMODE
+#        define I2C1_OPMODE OPMODE_I2C
+#    endif
+#    ifndef I2C1_CLOCK_SPEED
+#        define I2C1_CLOCK_SPEED 100000 /* 400000 */
+#    endif
+#    ifndef I2C1_DUTY_CYCLE
+#        define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
+#    endif
+#else
+// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
+// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
+#    ifndef I2C1_TIMINGR_PRESC
+#        define I2C1_TIMINGR_PRESC 0U
+#    endif
+#    ifndef I2C1_TIMINGR_SCLDEL
+#        define I2C1_TIMINGR_SCLDEL 7U
+#    endif
+#    ifndef I2C1_TIMINGR_SDADEL
+#        define I2C1_TIMINGR_SDADEL 0U
+#    endif
+#    ifndef I2C1_TIMINGR_SCLH
+#        define I2C1_TIMINGR_SCLH 38U
+#    endif
+#    ifndef I2C1_TIMINGR_SCLL
+#        define I2C1_TIMINGR_SCLL 129U
+#    endif
+#endif
+
+#ifndef I2C_DRIVER
+#    define I2C_DRIVER I2CD1
+#endif
+
+#ifdef USE_GPIOV1
+#    ifndef I2C1_SCL_PAL_MODE
+#        define I2C1_SCL_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
+#    endif
+#    ifndef I2C1_SDA_PAL_MODE
+#        define I2C1_SDA_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
+#    endif
+#else
+// The default PAL alternate modes are used to signal that the pins are used for I2C
+#    ifndef I2C1_SCL_PAL_MODE
+#        define I2C1_SCL_PAL_MODE 4
+#    endif
+#    ifndef I2C1_SDA_PAL_MODE
+#        define I2C1_SDA_PAL_MODE 4
+#    endif
+#endif
+
 static uint8_t i2c_address;
 
 static const I2CConfig i2cconfig = {
diff --git a/platforms/chibios/drivers/i2c_master.h b/platforms/chibios/drivers/i2c_master.h
index 5f082e9d1e..deee7ecc08 100644
--- a/platforms/chibios/drivers/i2c_master.h
+++ b/platforms/chibios/drivers/i2c_master.h
@@ -24,66 +24,7 @@
  */
 #pragma once
 
-#include <ch.h>
-#include <hal.h>
-
-#ifndef I2C1_SCL_PIN
-#    define I2C1_SCL_PIN B6
-#endif
-#ifndef I2C1_SDA_PIN
-#    define I2C1_SDA_PIN B7
-#endif
-
-#ifdef USE_I2CV1
-#    ifndef I2C1_OPMODE
-#        define I2C1_OPMODE OPMODE_I2C
-#    endif
-#    ifndef I2C1_CLOCK_SPEED
-#        define I2C1_CLOCK_SPEED 100000 /* 400000 */
-#    endif
-#    ifndef I2C1_DUTY_CYCLE
-#        define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
-#    endif
-#else
-// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
-// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
-#    ifndef I2C1_TIMINGR_PRESC
-#        define I2C1_TIMINGR_PRESC 0U
-#    endif
-#    ifndef I2C1_TIMINGR_SCLDEL
-#        define I2C1_TIMINGR_SCLDEL 7U
-#    endif
-#    ifndef I2C1_TIMINGR_SDADEL
-#        define I2C1_TIMINGR_SDADEL 0U
-#    endif
-#    ifndef I2C1_TIMINGR_SCLH
-#        define I2C1_TIMINGR_SCLH 38U
-#    endif
-#    ifndef I2C1_TIMINGR_SCLL
-#        define I2C1_TIMINGR_SCLL 129U
-#    endif
-#endif
-
-#ifndef I2C_DRIVER
-#    define I2C_DRIVER I2CD1
-#endif
-
-#ifdef USE_GPIOV1
-#    ifndef I2C1_SCL_PAL_MODE
-#        define I2C1_SCL_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
-#    endif
-#    ifndef I2C1_SDA_PAL_MODE
-#        define I2C1_SDA_PAL_MODE PAL_MODE_ALTERNATE_OPENDRAIN
-#    endif
-#else
-// The default PAL alternate modes are used to signal that the pins are used for I2C
-#    ifndef I2C1_SCL_PAL_MODE
-#        define I2C1_SCL_PAL_MODE 4
-#    endif
-#    ifndef I2C1_SDA_PAL_MODE
-#        define I2C1_SDA_PAL_MODE 4
-#    endif
-#endif
+#include <stdint.h>
 
 typedef int16_t i2c_status_t;