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-rw-r--r--keyboards/handwired/onekey/blackpill_f401/mcuconf.h264
1 files changed, 16 insertions, 248 deletions
diff --git a/keyboards/handwired/onekey/blackpill_f401/mcuconf.h b/keyboards/handwired/onekey/blackpill_f401/mcuconf.h
index ba6e934fe7..33e07847b4 100644
--- a/keyboards/handwired/onekey/blackpill_f401/mcuconf.h
+++ b/keyboards/handwired/onekey/blackpill_f401/mcuconf.h
@@ -1,253 +1,21 @@
-/*
- ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio
-
- Licensed under the Apache License, Version 2.0 (the "License");
- you may not use this file except in compliance with the License.
- You may obtain a copy of the License at
-
- http://www.apache.org/licenses/LICENSE-2.0
-
- Unless required by applicable law or agreed to in writing, software
- distributed under the License is distributed on an "AS IS" BASIS,
- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- See the License for the specific language governing permissions and
- limitations under the License.
-*/
-
-#ifndef MCUCONF_H
-#define MCUCONF_H
-
-/*
- * STM32F4xx drivers configuration.
- * The following settings override the default settings present in
- * the various device driver implementation headers.
- * Note that the settings for each driver only have effect if the whole
- * driver is enabled in halconf.h.
+/* Copyright 2020 Nick Brassel (tzarc)
*
- * IRQ priorities:
- * 15...0 Lowest...Highest.
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
*
- * DMA priorities:
- * 0...3 Lowest...Highest.
- */
-
-#define STM32F4xx_MCUCONF
-
-/*
- * HAL driver system settings.
- */
-#define STM32_NO_INIT FALSE
-#define STM32_HSI_ENABLED TRUE
-#define STM32_LSI_ENABLED TRUE
-#define STM32_HSE_ENABLED TRUE
-#define STM32_LSE_ENABLED FALSE
-#define STM32_CLOCK48_REQUIRED TRUE
-#define STM32_SW STM32_SW_PLL
-#define STM32_PLLSRC STM32_PLLSRC_HSE
-#define STM32_PLLM_VALUE 25
-#define STM32_PLLN_VALUE 336
-#define STM32_PLLP_VALUE 4
-#define STM32_PLLQ_VALUE 7
-#define STM32_HPRE STM32_HPRE_DIV1
-#define STM32_PPRE1 STM32_PPRE1_DIV4
-#define STM32_PPRE2 STM32_PPRE2_DIV2
-#define STM32_RTCSEL STM32_RTCSEL_LSI
-#define STM32_RTCPRE_VALUE 8
-#define STM32_MCO1SEL STM32_MCO1SEL_HSI
-#define STM32_MCO1PRE STM32_MCO1PRE_DIV1
-#define STM32_MCO2SEL STM32_MCO2SEL_SYSCLK
-#define STM32_MCO2PRE STM32_MCO2PRE_DIV5
-#define STM32_I2SSRC STM32_I2SSRC_CKIN
-#define STM32_PLLI2SN_VALUE 192
-#define STM32_PLLI2SR_VALUE 5
-#define STM32_PVD_ENABLE FALSE
-#define STM32_PLS STM32_PLS_LEV0
-#define STM32_BKPRAM_ENABLE FALSE
-
-/*
- * IRQ system settings.
- */
-#define STM32_IRQ_EXTI0_PRIORITY 6
-#define STM32_IRQ_EXTI1_PRIORITY 6
-#define STM32_IRQ_EXTI2_PRIORITY 6
-#define STM32_IRQ_EXTI3_PRIORITY 6
-#define STM32_IRQ_EXTI4_PRIORITY 6
-#define STM32_IRQ_EXTI5_9_PRIORITY 6
-#define STM32_IRQ_EXTI10_15_PRIORITY 6
-#define STM32_IRQ_EXTI16_PRIORITY 6
-#define STM32_IRQ_EXTI17_PRIORITY 15
-#define STM32_IRQ_EXTI18_PRIORITY 6
-#define STM32_IRQ_EXTI19_PRIORITY 6
-#define STM32_IRQ_EXTI20_PRIORITY 6
-#define STM32_IRQ_EXTI21_PRIORITY 15
-#define STM32_IRQ_EXTI22_PRIORITY 15
-
-/*
- * ADC driver system settings.
- */
-#define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4
-#define STM32_ADC_USE_ADC1 FALSE
-#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4)
-#define STM32_ADC_ADC1_DMA_PRIORITY 2
-#define STM32_ADC_IRQ_PRIORITY 6
-#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 6
-
-/*
- * GPT driver system settings.
- */
-#define STM32_GPT_USE_TIM1 FALSE
-#define STM32_GPT_USE_TIM2 FALSE
-#define STM32_GPT_USE_TIM3 FALSE
-#define STM32_GPT_USE_TIM4 FALSE
-#define STM32_GPT_USE_TIM5 FALSE
-#define STM32_GPT_USE_TIM9 FALSE
-#define STM32_GPT_USE_TIM11 FALSE
-#define STM32_GPT_TIM1_IRQ_PRIORITY 7
-#define STM32_GPT_TIM2_IRQ_PRIORITY 7
-#define STM32_GPT_TIM3_IRQ_PRIORITY 7
-#define STM32_GPT_TIM4_IRQ_PRIORITY 7
-#define STM32_GPT_TIM5_IRQ_PRIORITY 7
-#define STM32_GPT_TIM9_IRQ_PRIORITY 7
-#define STM32_GPT_TIM11_IRQ_PRIORITY 7
-
-/*
- * I2C driver system settings.
- */
-#define STM32_I2C_USE_I2C1 FALSE
-#define STM32_I2C_USE_I2C2 FALSE
-#define STM32_I2C_USE_I2C3 FALSE
-#define STM32_I2C_BUSY_TIMEOUT 50
-#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
-#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
-#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
-#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
-#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
-#define STM32_I2C_I2C1_IRQ_PRIORITY 5
-#define STM32_I2C_I2C2_IRQ_PRIORITY 5
-#define STM32_I2C_I2C3_IRQ_PRIORITY 5
-#define STM32_I2C_I2C1_DMA_PRIORITY 3
-#define STM32_I2C_I2C2_DMA_PRIORITY 3
-#define STM32_I2C_I2C3_DMA_PRIORITY 3
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
-
-/*
- * I2S driver system settings.
- */
-#define STM32_I2S_USE_SPI2 FALSE
-#define STM32_I2S_USE_SPI3 FALSE
-#define STM32_I2S_SPI2_IRQ_PRIORITY 10
-#define STM32_I2S_SPI3_IRQ_PRIORITY 10
-#define STM32_I2S_SPI2_DMA_PRIORITY 1
-#define STM32_I2S_SPI3_DMA_PRIORITY 1
-#define STM32_I2S_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
-#define STM32_I2S_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
-#define STM32_I2S_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
-#define STM32_I2S_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
-#define STM32_I2S_DMA_ERROR_HOOK(i2sp) osalSysHalt("DMA failure")
-
-/*
- * ICU driver system settings.
- */
-#define STM32_ICU_USE_TIM1 FALSE
-#define STM32_ICU_USE_TIM2 FALSE
-#define STM32_ICU_USE_TIM3 FALSE
-#define STM32_ICU_USE_TIM4 FALSE
-#define STM32_ICU_USE_TIM5 FALSE
-#define STM32_ICU_USE_TIM9 FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY 7
-#define STM32_ICU_TIM2_IRQ_PRIORITY 7
-#define STM32_ICU_TIM3_IRQ_PRIORITY 7
-#define STM32_ICU_TIM4_IRQ_PRIORITY 7
-#define STM32_ICU_TIM5_IRQ_PRIORITY 7
-#define STM32_ICU_TIM9_IRQ_PRIORITY 7
-
-/*
- * PWM driver system settings.
- */
-#define STM32_PWM_USE_ADVANCED FALSE
-#define STM32_PWM_USE_TIM1 FALSE
-#define STM32_PWM_USE_TIM2 FALSE
-#define STM32_PWM_USE_TIM3 FALSE
-#define STM32_PWM_USE_TIM4 FALSE
-#define STM32_PWM_USE_TIM5 FALSE
-#define STM32_PWM_USE_TIM9 FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY 7
-#define STM32_PWM_TIM2_IRQ_PRIORITY 7
-#define STM32_PWM_TIM3_IRQ_PRIORITY 7
-#define STM32_PWM_TIM4_IRQ_PRIORITY 7
-#define STM32_PWM_TIM5_IRQ_PRIORITY 7
-#define STM32_PWM_TIM9_IRQ_PRIORITY 7
-
-/*
- * SERIAL driver system settings.
- */
-#define STM32_SERIAL_USE_USART1 FALSE
-#define STM32_SERIAL_USE_USART2 FALSE
-#define STM32_SERIAL_USE_USART6 FALSE
-#define STM32_SERIAL_USART1_PRIORITY 12
-#define STM32_SERIAL_USART2_PRIORITY 12
-#define STM32_SERIAL_USART6_PRIORITY 12
-
-/*
- * SPI driver system settings.
- */
-#define STM32_SPI_USE_SPI1 FALSE
-#define STM32_SPI_USE_SPI2 FALSE
-#define STM32_SPI_USE_SPI3 FALSE
-#define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0)
-#define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3)
-#define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3)
-#define STM32_SPI_SPI2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
-#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
-#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
-#define STM32_SPI_SPI1_DMA_PRIORITY 1
-#define STM32_SPI_SPI2_DMA_PRIORITY 1
-#define STM32_SPI_SPI3_DMA_PRIORITY 1
-#define STM32_SPI_SPI1_IRQ_PRIORITY 10
-#define STM32_SPI_SPI2_IRQ_PRIORITY 10
-#define STM32_SPI_SPI3_IRQ_PRIORITY 10
-#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
-
-/*
- * ST driver system settings.
- */
-#define STM32_ST_IRQ_PRIORITY 8
-#define STM32_ST_USE_TIMER 2
-
-/*
- * UART driver system settings.
- */
-#define STM32_UART_USE_USART1 FALSE
-#define STM32_UART_USE_USART2 FALSE
-#define STM32_UART_USE_USART6 FALSE
-#define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
-#define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5)
-#define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
-#define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
-#define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7)
-#define STM32_UART_USART1_IRQ_PRIORITY 12
-#define STM32_UART_USART2_IRQ_PRIORITY 12
-#define STM32_UART_USART6_IRQ_PRIORITY 12
-#define STM32_UART_USART1_DMA_PRIORITY 0
-#define STM32_UART_USART2_DMA_PRIORITY 0
-#define STM32_UART_USART6_DMA_PRIORITY 0
-#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
-
-/*
- * USB driver system settings.
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <https://www.gnu.org/licenses/>.
*/
-#define STM32_USB_USE_OTG1 TRUE
-#define STM32_USB_OTG1_IRQ_PRIORITY 14
-#define STM32_USB_OTG1_RX_FIFO_SIZE 512
-#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1
-#define STM32_USB_OTG_THREAD_STACK_SIZE 128
-#define STM32_USB_OTGFIFO_FILL_BASEPRI 0
+#pragma once
-/*
- * WDG driver system settings.
- */
-#define STM32_WDG_USE_IWDG FALSE
+#include_next "mcuconf.h"
-#endif /* MCUCONF_H */
+#undef STM32_I2C_USE_I2C1
+#define STM32_I2C_USE_I2C1 TRUE