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-rw-r--r--keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c126
-rw-r--r--keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h1187
-rw-r--r--keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk5
-rw-r--r--keyboards/hadron/ver3/bootloader_defs.h7
-rw-r--r--keyboards/hadron/ver3/chconf.h520
-rw-r--r--keyboards/hadron/ver3/config.h192
-rw-r--r--keyboards/hadron/ver3/halconf.h388
-rw-r--r--keyboards/hadron/ver3/keymaps/default/config.h1
-rw-r--r--keyboards/hadron/ver3/keymaps/default/keymap.c295
-rw-r--r--keyboards/hadron/ver3/keymaps/default/readme.md2
-rw-r--r--keyboards/hadron/ver3/keymaps/readme.md23
-rw-r--r--keyboards/hadron/ver3/matrix.c195
-rw-r--r--keyboards/hadron/ver3/mcuconf.h257
-rw-r--r--keyboards/hadron/ver3/rev3.h21
-rw-r--r--keyboards/hadron/ver3/rules.mk57
-rw-r--r--keyboards/hadron/ver3/ver3.c196
-rw-r--r--keyboards/hadron/ver3/ver3.h21
17 files changed, 3493 insertions, 0 deletions
diff --git a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c
new file mode 100644
index 0000000000..4331155df4
--- /dev/null
+++ b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.c
@@ -0,0 +1,126 @@
+/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "hal.h"
+
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+const PALConfig pal_default_config = {
+#if STM32_HAS_GPIOA
+ {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR,
+ VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
+#endif
+#if STM32_HAS_GPIOB
+ {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR,
+ VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
+#endif
+#if STM32_HAS_GPIOC
+ {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR,
+ VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
+#endif
+#if STM32_HAS_GPIOD
+ {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR,
+ VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
+#endif
+#if STM32_HAS_GPIOE
+ {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR,
+ VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
+#endif
+#if STM32_HAS_GPIOF
+ {VAL_GPIOF_MODER, VAL_GPIOF_OTYPER, VAL_GPIOF_OSPEEDR, VAL_GPIOF_PUPDR,
+ VAL_GPIOF_ODR, VAL_GPIOF_AFRL, VAL_GPIOF_AFRH},
+#endif
+#if STM32_HAS_GPIOG
+ {VAL_GPIOG_MODER, VAL_GPIOG_OTYPER, VAL_GPIOG_OSPEEDR, VAL_GPIOG_PUPDR,
+ VAL_GPIOG_ODR, VAL_GPIOG_AFRL, VAL_GPIOG_AFRH},
+#endif
+#if STM32_HAS_GPIOH
+ {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR,
+ VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH},
+#endif
+#if STM32_HAS_GPIOI
+ {VAL_GPIOI_MODER, VAL_GPIOI_OTYPER, VAL_GPIOI_OSPEEDR, VAL_GPIOI_PUPDR,
+ VAL_GPIOI_ODR, VAL_GPIOI_AFRL, VAL_GPIOI_AFRH}
+#endif
+};
+#endif
+
+void enter_bootloader_mode_if_requested(void);
+
+/**
+ * @brief Early initialization code.
+ * @details This initialization must be performed just after stack setup
+ * and before any other initialization.
+ */
+void __early_init(void) {
+ enter_bootloader_mode_if_requested();
+ stm32_clock_init();
+}
+
+#if HAL_USE_SDC || defined(__DOXYGEN__)
+/**
+ * @brief SDC card detection.
+ */
+bool sdc_lld_is_card_inserted(SDCDriver *sdcp) {
+
+ (void)sdcp;
+ /* TODO: Fill the implementation.*/
+ return true;
+}
+
+/**
+ * @brief SDC card write protection detection.
+ */
+bool sdc_lld_is_write_protected(SDCDriver *sdcp) {
+
+ (void)sdcp;
+ /* TODO: Fill the implementation.*/
+ return false;
+}
+#endif /* HAL_USE_SDC */
+
+#if HAL_USE_MMC_SPI || defined(__DOXYGEN__)
+/**
+ * @brief MMC_SPI card detection.
+ */
+bool mmc_lld_is_card_inserted(MMCDriver *mmcp) {
+
+ (void)mmcp;
+ /* TODO: Fill the implementation.*/
+ return true;
+}
+
+/**
+ * @brief MMC_SPI card write protection detection.
+ */
+bool mmc_lld_is_write_protected(MMCDriver *mmcp) {
+
+ (void)mmcp;
+ /* TODO: Fill the implementation.*/
+ return false;
+}
+#endif
+
+/**
+ * @brief Board-specific initialization code.
+ * @todo Add your board-specific code, if any.
+ */
+void boardInit(void) {
+}
diff --git a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h
new file mode 100644
index 0000000000..ec26557f3a
--- /dev/null
+++ b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.h
@@ -0,0 +1,1187 @@
+/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for Clueboard 60% Keyboard
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_GENERIC_STM32_F303XC
+#define BOARD_NAME "Planck PCB"
+
+/*
+ * Board oscillators-related settings.
+ * NOTE: LSE not fitted.
+ */
+#if !defined(STM32_LSECLK)
+#define STM32_LSECLK 0U
+#endif
+
+#define STM32_LSEDRV (3U << 3U)
+
+#if !defined(STM32_HSECLK)
+#define STM32_HSECLK 8000000U
+#endif
+
+// #define STM32_HSE_BYPASS
+
+/*
+ * MCU type as defined in the ST header.
+ */
+#define STM32F303xC
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOA_PIN0 0U
+#define GPIOA_PIN1 1U
+#define GPIOA_PIN2 2U
+#define GPIOA_PIN3 3U
+#define GPIOA_PIN4 4U
+#define GPIOA_PIN5 5U
+#define GPIOA_PIN6 6U
+#define GPIOA_PIN7 7U
+#define GPIOA_PIN8 8U
+#define GPIOA_PIN9 9U
+#define GPIOA_PIN10 10U
+#define GPIOA_USB_DM 11U
+#define GPIOA_USB_DP 12U
+#define GPIOA_SWDIO 13U
+#define GPIOA_SWCLK 14U
+#define GPIOA_PIN15 15U
+
+#define GPIOB_PIN0 0U
+#define GPIOB_PIN1 1U
+#define GPIOB_PIN2 2U
+#define GPIOB_PIN3 3U
+#define GPIOB_PIN4 4U
+#define GPIOB_PIN5 5U
+#define GPIOB_PIN6 6U
+#define GPIOB_PIN7 7U
+#define GPIOB_PIN8 8U
+#define GPIOB_PIN9 9U
+#define GPIOB_PIN10 10U
+#define GPIOB_PIN11 11U
+#define GPIOB_PIN12 12U
+#define GPIOB_PIN13 13U
+#define GPIOB_PIN14 14U
+#define GPIOB_PIN15 15U
+
+#define GPIOC_PIN0 0U
+#define GPIOC_PIN1 1U
+#define GPIOC_PIN2 2U
+#define GPIOC_PIN3 3U
+#define GPIOC_PIN4 4U
+#define GPIOC_PIN5 5U
+#define GPIOC_PIN6 6U
+#define GPIOC_PIN7 7U
+#define GPIOC_PIN8 8U
+#define GPIOC_PIN9 9U
+#define GPIOC_PIN10 10U
+#define GPIOC_PIN11 11U
+#define GPIOC_PIN12 12U
+#define GPIOC_PIN13 13U
+#define GPIOC_PIN14 14U
+#define GPIOC_PIN15 15U
+
+#define GPIOD_PIN0 0U
+#define GPIOD_PIN1 1U
+#define GPIOD_PIN2 2U
+#define GPIOD_PIN3 3U
+#define GPIOD_PIN4 4U
+#define GPIOD_PIN5 5U
+#define GPIOD_PIN6 6U
+#define GPIOD_PIN7 7U
+#define GPIOD_PIN8 8U
+#define GPIOD_PIN9 9U
+#define GPIOD_PIN10 10U
+#define GPIOD_PIN11 11U
+#define GPIOD_PIN12 12U
+#define GPIOD_PIN13 13U
+#define GPIOD_PIN14 14U
+#define GPIOD_PIN15 15U
+
+#define GPIOE_PIN0 0U
+#define GPIOE_PIN1 1U
+#define GPIOE_PIN2 2U
+#define GPIOE_PIN3 3U
+#define GPIOE_PIN4 4U
+#define GPIOE_PIN5 5U
+#define GPIOE_PIN6 6U
+#define GPIOE_PIN7 7U
+#define GPIOE_PIN8 8U
+#define GPIOE_PIN9 9U
+#define GPIOE_PIN10 10U
+#define GPIOE_PIN11 11U
+#define GPIOE_PIN12 12U
+#define GPIOE_PIN13 13U
+#define GPIOE_PIN14 14U
+#define GPIOE_PIN15 15U
+
+#define GPIOF_I2C2_SDA 0U
+#define GPIOF_I2C2_SCL 1U
+#define GPIOF_PIN2 2U
+#define GPIOF_PIN3 3U
+#define GPIOF_PIN4 4U
+#define GPIOF_PIN5 5U
+#define GPIOF_PIN6 6U
+#define GPIOF_PIN7 7U
+#define GPIOF_PIN8 8U
+#define GPIOF_PIN9 9U
+#define GPIOF_PIN10 10U
+#define GPIOF_PIN11 11U
+#define GPIOF_PIN12 12U
+#define GPIOF_PIN13 13U
+#define GPIOF_PIN14 14U
+#define GPIOF_PIN15 15U
+
+#define GPIOG_PIN0 0U
+#define GPIOG_PIN1 1U
+#define GPIOG_PIN2 2U
+#define GPIOG_PIN3 3U
+#define GPIOG_PIN4 4U
+#define GPIOG_PIN5 5U
+#define GPIOG_PIN6 6U
+#define GPIOG_PIN7 7U
+#define GPIOG_PIN8 8U
+#define GPIOG_PIN9 9U
+#define GPIOG_PIN10 10U
+#define GPIOG_PIN11 11U
+#define GPIOG_PIN12 12U
+#define GPIOG_PIN13 13U
+#define GPIOG_PIN14 14U
+#define GPIOG_PIN15 15U
+
+#define GPIOH_PIN0 0U
+#define GPIOH_PIN1 1U
+#define GPIOH_PIN2 2U
+#define GPIOH_PIN3 3U
+#define GPIOH_PIN4 4U
+#define GPIOH_PIN5 5U
+#define GPIOH_PIN6 6U
+#define GPIOH_PIN7 7U
+#define GPIOH_PIN8 8U
+#define GPIOH_PIN9 9U
+#define GPIOH_PIN10 10U
+#define GPIOH_PIN11 11U
+#define GPIOH_PIN12 12U
+#define GPIOH_PIN13 13U
+#define GPIOH_PIN14 14U
+#define GPIOH_PIN15 15U
+
+/*
+ * IO lines assignments.
+ */
+#define LINE_L3GD20_SDI PAL_LINE(GPIOA, 7U)
+#define LINE_USB_DM PAL_LINE(GPIOA, 11U)
+#define LINE_USB_DP PAL_LINE(GPIOA, 12U)
+#define LINE_SWDIO PAL_LINE(GPIOA, 13U)
+#define LINE_SWCLK PAL_LINE(GPIOA, 14U)
+
+#define LINE_PIN6 PAL_LINE(GPIOF, 0U)
+#define LINE_PIN7 PAL_LINE(GPIOF, 1U)
+
+#define LINE_CAPS_LOCK PAL_LINE(GPIOB, 7U)
+
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+#define PIN_MODE_INPUT(n) (0U << ((n) * 2U))
+#define PIN_MODE_OUTPUT(n) (1U << ((n) * 2U))
+#define PIN_MODE_ALTERNATE(n) (2U << ((n) * 2U))
+#define PIN_MODE_ANALOG(n) (3U << ((n) * 2U))
+#define PIN_ODR_LOW(n) (0U << (n))
+#define PIN_ODR_HIGH(n) (1U << (n))
+#define PIN_OTYPE_PUSHPULL(n) (0U << (n))
+#define PIN_OTYPE_OPENDRAIN(n) (1U << (n))
+#define PIN_OSPEED_VERYLOW(n) (0U << ((n) * 2U))
+#define PIN_OSPEED_LOW(n) (1U << ((n) * 2U))
+#define PIN_OSPEED_MEDIUM(n) (2U << ((n) * 2U))
+#define PIN_OSPEED_HIGH(n) (3U << ((n) * 2U))
+#define PIN_PUPDR_FLOATING(n) (0U << ((n) * 2U))
+#define PIN_PUPDR_PULLUP(n) (1U << ((n) * 2U))
+#define PIN_PUPDR_PULLDOWN(n) (2U << ((n) * 2U))
+#define PIN_AFIO_AF(n, v) ((v) << (((n) % 8U) * 4U))
+
+/*
+ * GPIOA setup:
+ *
+ * PA0 - NC
+ * PA1 - NC
+ * PA2 - COL1
+ * PA3 - COL2
+ * PA4 - SPEAKER1
+ * PA5 - SPEAKER2
+ * PA6 - COL3
+ * PA7 - COL8
+ * PA8 - COL6
+ * PA9 - COL7
+ * PA10 - ROW5
+ * PA11 - USB_DM (alternate 14).
+ * PA12 - USB_DP (alternate 14).
+ * PA13 - SWDIO (alternate 0).
+ * PA14 - SWCLK (alternate 0).
+ * PA15 - ROW4
+ */
+#define VAL_GPIOA_MODER (PIN_MODE_INPUT(GPIOA_PIN0) | \
+ PIN_MODE_ALTERNATE(GPIOA_PIN1) | \
+ PIN_MODE_INPUT(GPIOA_PIN2) | \
+ PIN_MODE_INPUT(GPIOA_PIN3) | \
+ PIN_MODE_INPUT(GPIOA_PIN4) | \
+ PIN_MODE_INPUT(GPIOA_PIN5) | \
+ PIN_MODE_INPUT(GPIOA_PIN6) | \
+ PIN_MODE_INPUT(GPIOA_PIN7) | \
+ PIN_MODE_INPUT(GPIOA_PIN8) | \
+ PIN_MODE_INPUT(GPIOA_PIN9) | \
+ PIN_MODE_INPUT(GPIOA_PIN10) | \
+ PIN_MODE_ALTERNATE(GPIOA_USB_DM) | \
+ PIN_MODE_ALTERNATE(GPIOA_USB_DP) | \
+ PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
+ PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
+ PIN_MODE_INPUT(GPIOA_PIN15))
+#define VAL_GPIOA_OTYPER (PIN_OTYPE_PUSHPULL(GPIOA_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_USB_DM) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_USB_DP) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_SWDIO) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_SWCLK) | \
+ PIN_OTYPE_PUSHPULL(GPIOA_PIN15))
+#define VAL_GPIOA_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOA_PIN0) | \
+ PIN_OSPEED_HIGH(GPIOA_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN10) | \
+ PIN_OSPEED_HIGH(GPIOA_USB_DM) | \
+ PIN_OSPEED_VERYLOW(GPIOA_USB_DP) | \
+ PIN_OSPEED_HIGH(GPIOA_SWDIO) | \
+ PIN_OSPEED_HIGH(GPIOA_SWCLK) | \
+ PIN_OSPEED_VERYLOW(GPIOA_PIN15))
+#define VAL_GPIOA_PUPDR (PIN_PUPDR_FLOATING(GPIOA_PIN0) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN1) | \
+ PIN_PUPDR_PULLUP(GPIOA_PIN2) | \
+ PIN_PUPDR_PULLUP(GPIOA_PIN3) | \
+ PIN_PUPDR_PULLUP(GPIOA_PIN4) | \
+ PIN_PUPDR_PULLUP(GPIOA_PIN5) | \
+ PIN_PUPDR_PULLUP(GPIOA_PIN6) | \
+ PIN_PUPDR_FLOATING(GPIOA_PIN7) | \
+ PIN_PUPDR_PULLUP(GPIOA_PIN8) | \
+ PIN_PUPDR_PULLUP(GPIOA_PIN9) | \
+ PIN_PUPDR_PULLUP(GPIOA_PIN10) | \
+ PIN_PUPDR_FLOATING(GPIOA_USB_DM) | \
+ PIN_PUPDR_FLOATING(GPIOA_USB_DP) | \
+ PIN_PUPDR_PULLUP(GPIOA_SWDIO) | \
+ PIN_PUPDR_PULLDOWN(GPIOA_SWCLK) | \
+ PIN_PUPDR_PULLUP(GPIOA_PIN15))
+#define VAL_GPIOA_ODR (PIN_ODR_HIGH(GPIOA_PIN0) | \
+ PIN_ODR_HIGH(GPIOA_PIN1) | \
+ PIN_ODR_HIGH(GPIOA_PIN2) | \
+ PIN_ODR_HIGH(GPIOA_PIN3) | \
+ PIN_ODR_HIGH(GPIOA_PIN4) | \
+ PIN_ODR_HIGH(GPIOA_PIN5) | \
+ PIN_ODR_HIGH(GPIOA_PIN6) | \
+ PIN_ODR_HIGH(GPIOA_PIN7) | \
+ PIN_ODR_HIGH(GPIOA_PIN8) | \
+ PIN_ODR_HIGH(GPIOA_PIN9) | \
+ PIN_ODR_HIGH(GPIOA_PIN10) | \
+ PIN_ODR_HIGH(GPIOA_USB_DM) | \
+ PIN_ODR_HIGH(GPIOA_USB_DP) | \
+ PIN_ODR_HIGH(GPIOA_SWDIO) | \
+ PIN_ODR_HIGH(GPIOA_SWCLK) | \
+ PIN_ODR_HIGH(GPIOA_PIN15))
+#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
+ PIN_AFIO_AF(GPIOA_PIN1, 1) | \
+ PIN_AFIO_AF(GPIOA_PIN2, 0) | \
+ PIN_AFIO_AF(GPIOA_PIN3, 0) | \
+ PIN_AFIO_AF(GPIOA_PIN4, 0) | \
+ PIN_AFIO_AF(GPIOA_PIN5, 5) | \
+ PIN_AFIO_AF(GPIOA_PIN6, 5) | \
+ PIN_AFIO_AF(GPIOA_PIN7, 5))
+#define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
+ PIN_AFIO_AF(GPIOA_PIN9, 0) | \
+ PIN_AFIO_AF(GPIOA_PIN10, 0) | \
+ PIN_AFIO_AF(GPIOA_USB_DM, 14) | \
+ PIN_AFIO_AF(GPIOA_USB_DP, 14) | \
+ PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
+ PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
+ PIN_AFIO_AF(GPIOA_PIN15, 0))
+
+/*
+ * GPIOB setup:
+ *
+ * PB0 - PIN0 (input pullup).
+ * PB1 - PIN1 (input pullup).
+ * PB2 - PIN2 (input pullup).
+ * PB3 - PIN3 (alternate 0).
+ * PB4 - PIN4 (input pullup).
+ * PB5 - PIN5 (input pullup).
+ * PB6 - PIN6 LSM303DLHC_SCL (alternate 4).
+ * PB7 - PIN7 LSM303DLHC_SDA (alternate 4).
+ * PB8 - PIN8 (input pullup).
+ * PB9 - PIN9 (input pullup).
+ * PB10 - PIN10 (input pullup).
+ * PB11 - PIN11 (input pullup).
+ * PB12 - PIN12 (input pullup).
+ * PB13 - PIN13 (input pullup).
+ * PB14 - PIN14 (input pullup).
+ * PB15 - PIN15 (input pullup).
+ */
+#define VAL_GPIOB_MODER (PIN_MODE_INPUT(GPIOB_PIN0) | \
+ PIN_MODE_INPUT(GPIOB_PIN1) | \
+ PIN_MODE_INPUT(GPIOB_PIN2) | \
+ PIN_MODE_ALTERNATE(GPIOB_PIN3) | \
+ PIN_MODE_INPUT(GPIOB_PIN4) | \
+ PIN_MODE_INPUT(GPIOB_PIN5) | \
+ PIN_MODE_ALTERNATE(GPIOB_PIN6) | \
+ PIN_MODE_OUTPUT(GPIOB_PIN7) | \
+ PIN_MODE_INPUT(GPIOB_PIN8) | \
+ PIN_MODE_INPUT(GPIOB_PIN9) | \
+ PIN_MODE_INPUT(GPIOB_PIN10) | \
+ PIN_MODE_INPUT(GPIOB_PIN11) | \
+ PIN_MODE_INPUT(GPIOB_PIN12) | \
+ PIN_MODE_INPUT(GPIOB_PIN13) | \
+ PIN_MODE_INPUT(GPIOB_PIN14) | \
+ PIN_MODE_INPUT(GPIOB_PIN15))
+#define VAL_GPIOB_OTYPER (PIN_OTYPE_PUSHPULL(GPIOB_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN5) | \
+ PIN_OTYPE_OPENDRAIN(GPIOB_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOB_PIN15))
+#define VAL_GPIOB_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOB_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN2) | \
+ PIN_OSPEED_HIGH(GPIOB_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN5) | \
+ PIN_OSPEED_HIGH(GPIOB_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOB_PIN15))
+#define VAL_GPIOB_PUPDR (PIN_PUPDR_PULLUP(GPIOB_PIN0) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN1) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN2) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN3) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN4) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN5) | \
+ PIN_PUPDR_FLOATING(GPIOB_PIN6) | \
+ PIN_PUPDR_PULLDOWN(GPIOB_PIN7) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN8) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN9) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN10) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN11) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN12) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN13) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN14) | \
+ PIN_PUPDR_PULLUP(GPIOB_PIN15))
+#define VAL_GPIOB_ODR (PIN_ODR_HIGH(GPIOB_PIN0) | \
+ PIN_ODR_HIGH(GPIOB_PIN1) | \
+ PIN_ODR_HIGH(GPIOB_PIN2) | \
+ PIN_ODR_HIGH(GPIOB_PIN3) | \
+ PIN_ODR_HIGH(GPIOB_PIN4) | \
+ PIN_ODR_HIGH(GPIOB_PIN5) | \
+ PIN_ODR_HIGH(GPIOB_PIN6) | \
+ PIN_ODR_LOW(GPIOB_PIN7) | \
+ PIN_ODR_HIGH(GPIOB_PIN8) | \
+ PIN_ODR_HIGH(GPIOB_PIN9) | \
+ PIN_ODR_HIGH(GPIOB_PIN10) | \
+ PIN_ODR_HIGH(GPIOB_PIN11) | \
+ PIN_ODR_HIGH(GPIOB_PIN12) | \
+ PIN_ODR_HIGH(GPIOB_PIN13) | \
+ PIN_ODR_HIGH(GPIOB_PIN14) | \
+ PIN_ODR_HIGH(GPIOB_PIN15))
+#define VAL_GPIOB_AFRL (PIN_AFIO_AF(GPIOB_PIN0, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN1, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN2, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN3, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN4, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN5, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN6, 4) | \
+ PIN_AFIO_AF(GPIOB_PIN7, 0))
+#define VAL_GPIOB_AFRH (PIN_AFIO_AF(GPIOB_PIN8, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN9, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN10, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN11, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN12, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN13, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN14, 0) | \
+ PIN_AFIO_AF(GPIOB_PIN15, 0))
+
+/*
+ * GPIOC setup:
+ *
+ * PC0 - PIN0 (input pullup).
+ * PC1 - PIN1 (input pullup).
+ * PC2 - PIN2 (input pullup).
+ * PC3 - PIN3 (input pullup).
+ * PC4 - PIN4 (input pullup).
+ * PC5 - PIN5 (input pullup).
+ * PC6 - PIN6 (input pullup).
+ * PC7 - PIN7 (input pullup).
+ * PC8 - PIN8 (input pullup).
+ * PC9 - PIN9 (input pullup).
+ * PC10 - PIN10 (input pullup).
+ * PC11 - PIN11 (input pullup).
+ * PC12 - PIN12 (input pullup).
+ * PC13 - PIN13 (input pullup).
+ * PC14 - PIN14 (input floating).
+ * PC15 - PIN15 (input floating).
+ */
+#define VAL_GPIOC_MODER (PIN_MODE_INPUT(GPIOC_PIN0) | \
+ PIN_MODE_INPUT(GPIOC_PIN1) | \
+ PIN_MODE_INPUT(GPIOC_PIN2) | \
+ PIN_MODE_INPUT(GPIOC_PIN3) | \
+ PIN_MODE_INPUT(GPIOC_PIN4) | \
+ PIN_MODE_INPUT(GPIOC_PIN5) | \
+ PIN_MODE_INPUT(GPIOC_PIN6) | \
+ PIN_MODE_INPUT(GPIOC_PIN7) | \
+ PIN_MODE_INPUT(GPIOC_PIN8) | \
+ PIN_MODE_INPUT(GPIOC_PIN9) | \
+ PIN_MODE_INPUT(GPIOC_PIN10) | \
+ PIN_MODE_INPUT(GPIOC_PIN11) | \
+ PIN_MODE_INPUT(GPIOC_PIN12) | \
+ PIN_MODE_INPUT(GPIOC_PIN13) | \
+ PIN_MODE_INPUT(GPIOC_PIN14) | \
+ PIN_MODE_INPUT(GPIOC_PIN15))
+#define VAL_GPIOC_OTYPER (PIN_OTYPE_PUSHPULL(GPIOC_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOC_PIN15))
+#define VAL_GPIOC_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOC_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOC_PIN13) | \
+ PIN_OSPEED_HIGH(GPIOC_PIN14) | \
+ PIN_OSPEED_HIGH(GPIOC_PIN15))
+#define VAL_GPIOC_PUPDR (PIN_PUPDR_PULLUP(GPIOC_PIN0) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN1) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN2) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN3) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN4) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN5) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN6) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN7) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN8) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN9) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN10) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN11) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN12) | \
+ PIN_PUPDR_PULLUP(GPIOC_PIN13) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN14) | \
+ PIN_PUPDR_FLOATING(GPIOC_PIN15))
+#define VAL_GPIOC_ODR (PIN_ODR_HIGH(GPIOC_PIN0) | \
+ PIN_ODR_HIGH(GPIOC_PIN1) | \
+ PIN_ODR_HIGH(GPIOC_PIN2) | \
+ PIN_ODR_HIGH(GPIOC_PIN3) | \
+ PIN_ODR_HIGH(GPIOC_PIN4) | \
+ PIN_ODR_HIGH(GPIOC_PIN5) | \
+ PIN_ODR_HIGH(GPIOC_PIN6) | \
+ PIN_ODR_HIGH(GPIOC_PIN7) | \
+ PIN_ODR_HIGH(GPIOC_PIN8) | \
+ PIN_ODR_HIGH(GPIOC_PIN9) | \
+ PIN_ODR_HIGH(GPIOC_PIN10) | \
+ PIN_ODR_HIGH(GPIOC_PIN11) | \
+ PIN_ODR_HIGH(GPIOC_PIN12) | \
+ PIN_ODR_HIGH(GPIOC_PIN13) | \
+ PIN_ODR_HIGH(GPIOC_PIN14) | \
+ PIN_ODR_HIGH(GPIOC_PIN15))
+#define VAL_GPIOC_AFRL (PIN_AFIO_AF(GPIOC_PIN0, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN1, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN2, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN3, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN4, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN5, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN6, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN7, 0))
+#define VAL_GPIOC_AFRH (PIN_AFIO_AF(GPIOC_PIN8, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN9, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN10, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN11, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN12, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN13, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN14, 0) | \
+ PIN_AFIO_AF(GPIOC_PIN15, 0))
+
+/*
+ * GPIOD setup:
+ *
+ * PD0 - PIN0 (input pullup).
+ * PD1 - PIN1 (input pullup).
+ * PD2 - PIN2 (input pullup).
+ * PD3 - PIN3 (input pullup).
+ * PD4 - PIN4 (input pullup).
+ * PD5 - PIN5 (input pullup).
+ * PD6 - PIN6 (input pullup).
+ * PD7 - PIN7 (input pullup).
+ * PD8 - PIN8 (input pullup).
+ * PD9 - PIN9 (input pullup).
+ * PD11 - PIN10 (input pullup).
+ * PD11 - PIN11 (input pullup).
+ * PD12 - PIN12 (input pullup).
+ * PD13 - PIN13 (input pullup).
+ * PD14 - PIN14 (input pullup).
+ * PD15 - PIN15 (input pullup).
+ */
+#define VAL_GPIOD_MODER (PIN_MODE_INPUT(GPIOD_PIN0) | \
+ PIN_MODE_INPUT(GPIOD_PIN1) | \
+ PIN_MODE_INPUT(GPIOD_PIN2) | \
+ PIN_MODE_INPUT(GPIOD_PIN3) | \
+ PIN_MODE_INPUT(GPIOD_PIN4) | \
+ PIN_MODE_INPUT(GPIOD_PIN5) | \
+ PIN_MODE_INPUT(GPIOD_PIN6) | \
+ PIN_MODE_INPUT(GPIOD_PIN7) | \
+ PIN_MODE_INPUT(GPIOD_PIN8) | \
+ PIN_MODE_INPUT(GPIOD_PIN9) | \
+ PIN_MODE_INPUT(GPIOD_PIN10) | \
+ PIN_MODE_INPUT(GPIOD_PIN11) | \
+ PIN_MODE_INPUT(GPIOD_PIN12) | \
+ PIN_MODE_INPUT(GPIOD_PIN13) | \
+ PIN_MODE_INPUT(GPIOD_PIN14) | \
+ PIN_MODE_INPUT(GPIOD_PIN15))
+#define VAL_GPIOD_OTYPER (PIN_OTYPE_PUSHPULL(GPIOD_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOD_PIN15))
+#define VAL_GPIOD_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOD_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOD_PIN15))
+#define VAL_GPIOD_PUPDR (PIN_PUPDR_PULLUP(GPIOD_PIN0) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN1) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN2) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN3) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN4) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN5) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN6) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN7) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN8) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN9) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN10) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN11) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN12) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN13) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN14) | \
+ PIN_PUPDR_PULLUP(GPIOD_PIN15))
+#define VAL_GPIOD_ODR (PIN_ODR_HIGH(GPIOD_PIN0) | \
+ PIN_ODR_HIGH(GPIOD_PIN1) | \
+ PIN_ODR_HIGH(GPIOD_PIN2) | \
+ PIN_ODR_HIGH(GPIOD_PIN3) | \
+ PIN_ODR_HIGH(GPIOD_PIN4) | \
+ PIN_ODR_HIGH(GPIOD_PIN5) | \
+ PIN_ODR_HIGH(GPIOD_PIN6) | \
+ PIN_ODR_HIGH(GPIOD_PIN7) | \
+ PIN_ODR_HIGH(GPIOD_PIN8) | \
+ PIN_ODR_HIGH(GPIOD_PIN9) | \
+ PIN_ODR_HIGH(GPIOD_PIN10) | \
+ PIN_ODR_HIGH(GPIOD_PIN11) | \
+ PIN_ODR_HIGH(GPIOD_PIN12) | \
+ PIN_ODR_HIGH(GPIOD_PIN13) | \
+ PIN_ODR_HIGH(GPIOD_PIN14) | \
+ PIN_ODR_HIGH(GPIOD_PIN15))
+#define VAL_GPIOD_AFRL (PIN_AFIO_AF(GPIOD_PIN0, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN1, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN2, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN3, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN4, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN5, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN6, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN7, 0))
+#define VAL_GPIOD_AFRH (PIN_AFIO_AF(GPIOD_PIN8, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN9, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN10, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN11, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN12, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN13, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN14, 0) | \
+ PIN_AFIO_AF(GPIOD_PIN15, 0))
+
+/*
+ * GPIOE setup:
+ *
+ * PE0 - PIN0 (input pullup).
+ * PE1 - PIN1 (input pullup).
+ * PE2 - PIN2 (input pullup).
+ * PE3 - PIN3 L3GD20_CS (output pushpull maximum).
+ * PE4 - PIN4 (input pullup).
+ * PE5 - PIN5 (input pullup).
+ * PE6 - PIN6 (input pullup).
+ * PE7 - PIN7 (input pullup).
+ * PE8 - PIN8 (output pushpull maximum).
+ * PE9 - PIN9 (output pushpull maximum).
+ * PE10 - PIN10 (output pushpull maximum).
+ * PE11 - PIN11 (output pushpull maximum).
+ * PE12 - PIN12 (output pushpull maximum).
+ * PE13 - PIN13 (output pushpull maximum).
+ * PE14 - PIN14 (output pushpull maximum).
+ * PE15 - PIN15 (output pushpull maximum).
+ */
+#define VAL_GPIOE_MODER (PIN_MODE_INPUT(GPIOE_PIN0) | \
+ PIN_MODE_INPUT(GPIOE_PIN1) | \
+ PIN_MODE_INPUT(GPIOE_PIN2) |\
+ PIN_MODE_OUTPUT(GPIOE_PIN3) | \
+ PIN_MODE_INPUT(GPIOE_PIN4) |\
+ PIN_MODE_INPUT(GPIOE_PIN5) |\
+ PIN_MODE_INPUT(GPIOE_PIN6) | \
+ PIN_MODE_INPUT(GPIOE_PIN7) | \
+ PIN_MODE_OUTPUT(GPIOE_PIN8) | \
+ PIN_MODE_OUTPUT(GPIOE_PIN9) | \
+ PIN_MODE_OUTPUT(GPIOE_PIN10) | \
+ PIN_MODE_OUTPUT(GPIOE_PIN11) | \
+ PIN_MODE_OUTPUT(GPIOE_PIN12) | \
+ PIN_MODE_OUTPUT(GPIOE_PIN13) | \
+ PIN_MODE_OUTPUT(GPIOE_PIN14) | \
+ PIN_MODE_OUTPUT(GPIOE_PIN15))
+#define VAL_GPIOE_OTYPER (PIN_OTYPE_PUSHPULL(GPIOE_PIN0) |\
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN1) |\
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN2) |\
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN4) |\
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN5) |\
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN10) |\
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN14) |\
+ PIN_OTYPE_PUSHPULL(GPIOE_PIN15))
+#define VAL_GPIOE_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOE_PIN0) |\
+ PIN_OSPEED_VERYLOW(GPIOE_PIN1) |\
+ PIN_OSPEED_VERYLOW(GPIOE_PIN2) |\
+ PIN_OSPEED_HIGH(GPIOE_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN4) |\
+ PIN_OSPEED_VERYLOW(GPIOE_PIN5) |\
+ PIN_OSPEED_VERYLOW(GPIOE_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOE_PIN7) | \
+ PIN_OSPEED_HIGH(GPIOE_PIN8) | \
+ PIN_OSPEED_HIGH(GPIOE_PIN9) | \
+ PIN_OSPEED_HIGH(GPIOE_PIN10) | \
+ PIN_OSPEED_HIGH(GPIOE_PIN11) | \
+ PIN_OSPEED_HIGH(GPIOE_PIN12) | \
+ PIN_OSPEED_HIGH(GPIOE_PIN13) | \
+ PIN_OSPEED_HIGH(GPIOE_PIN14) | \
+ PIN_OSPEED_HIGH(GPIOE_PIN15))
+#define VAL_GPIOE_PUPDR (PIN_PUPDR_PULLUP(GPIOE_PIN0) | \
+ PIN_PUPDR_PULLUP(GPIOE_PIN1) | \
+ PIN_PUPDR_PULLUP(GPIOE_PIN2) |\
+ PIN_PUPDR_FLOATING(GPIOE_PIN3) | \
+ PIN_PUPDR_PULLUP(GPIOE_PIN4) |\
+ PIN_PUPDR_PULLUP(GPIOE_PIN5) |\
+ PIN_PUPDR_PULLUP(GPIOE_PIN6) | \
+ PIN_PUPDR_PULLUP(GPIOE_PIN7) | \
+ PIN_PUPDR_PULLUP(GPIOE_PIN8) | \
+ PIN_PUPDR_PULLUP(GPIOE_PIN9) | \
+ PIN_PUPDR_PULLUP(GPIOE_PIN10) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN11) | \
+ PIN_PUPDR_PULLUP(GPIOE_PIN12) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN13) | \
+ PIN_PUPDR_FLOATING(GPIOE_PIN14) |\
+ PIN_PUPDR_FLOATING(GPIOE_PIN15))
+#define VAL_GPIOE_ODR (PIN_ODR_HIGH(GPIOE_PIN0) | \
+ PIN_ODR_HIGH(GPIOE_PIN1) | \
+ PIN_ODR_HIGH(GPIOE_PIN2) | \
+ PIN_ODR_HIGH(GPIOE_PIN3) | \
+ PIN_ODR_HIGH(GPIOE_PIN4) | \
+ PIN_ODR_HIGH(GPIOE_PIN5) | \
+ PIN_ODR_HIGH(GPIOE_PIN6) | \
+ PIN_ODR_HIGH(GPIOE_PIN7) | \
+ PIN_ODR_LOW(GPIOE_PIN8) | \
+ PIN_ODR_LOW(GPIOE_PIN9) | \
+ PIN_ODR_LOW(GPIOE_PIN10) | \
+ PIN_ODR_LOW(GPIOE_PIN11) | \
+ PIN_ODR_LOW(GPIOE_PIN12) | \
+ PIN_ODR_LOW(GPIOE_PIN13) | \
+ PIN_ODR_LOW(GPIOE_PIN14) | \
+ PIN_ODR_LOW(GPIOE_PIN15))
+#define VAL_GPIOE_AFRL (PIN_AFIO_AF(GPIOE_PIN0, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN1, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN2, 0) |\
+ PIN_AFIO_AF(GPIOE_PIN3, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN4, 0) |\
+ PIN_AFIO_AF(GPIOE_PIN5, 0) |\
+ PIN_AFIO_AF(GPIOE_PIN6, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN7, 0))
+#define VAL_GPIOE_AFRH (PIN_AFIO_AF(GPIOE_PIN8, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN9, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN10, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN11, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN12, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN13, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN14, 0) | \
+ PIN_AFIO_AF(GPIOE_PIN15, 0))
+
+/*
+ * GPIOF setup:
+ *
+ * PF0 - I2C2_SDA (input floating).
+ * PF1 - I2C2_SCL (input floating).
+ * PF2 - PIN2 (input pullup).
+ * PF3 - PIN3 (input pullup).
+ * PF4 - PIN4 (input pullup).
+ * PF5 - PIN5 (input pullup).
+ * PF6 - PIN6 (input pullup).
+ * PF7 - PIN7 (input pullup).
+ * PF8 - PIN8 (input pullup).
+ * PF9 - PIN9 (input pullup).
+ * PF10 - PIN10 (input pullup).
+ * PF11 - PIN11 (input pullup).
+ * PF12 - PIN12 (input pullup).
+ * PF13 - PIN13 (input pullup).
+ * PF14 - PIN14 (input pullup).
+ * PF15 - PIN15 (input pullup).
+ */
+#define VAL_GPIOF_MODER (PIN_MODE_INPUT(GPIOF_I2C2_SDA) | \
+ PIN_MODE_INPUT(GPIOF_I2C2_SCL) | \
+ PIN_MODE_INPUT(GPIOF_PIN2) | \
+ PIN_MODE_INPUT(GPIOF_PIN3) | \
+ PIN_MODE_INPUT(GPIOF_PIN4) | \
+ PIN_MODE_INPUT(GPIOF_PIN5) | \
+ PIN_MODE_INPUT(GPIOF_PIN6) | \
+ PIN_MODE_INPUT(GPIOF_PIN7) | \
+ PIN_MODE_INPUT(GPIOF_PIN8) | \
+ PIN_MODE_INPUT(GPIOF_PIN9) | \
+ PIN_MODE_INPUT(GPIOF_PIN10) | \
+ PIN_MODE_INPUT(GPIOF_PIN11) | \
+ PIN_MODE_INPUT(GPIOF_PIN12) | \
+ PIN_MODE_INPUT(GPIOF_PIN13) | \
+ PIN_MODE_INPUT(GPIOF_PIN14) | \
+ PIN_MODE_INPUT(GPIOF_PIN15))
+#define VAL_GPIOF_OTYPER (PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SDA) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_I2C2_SCL) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOF_PIN15))
+#define VAL_GPIOF_OSPEEDR (PIN_OSPEED_HIGH(GPIOF_I2C2_SDA) | \
+ PIN_OSPEED_HIGH(GPIOF_I2C2_SCL) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOF_PIN15))
+#define VAL_GPIOF_PUPDR (PIN_PUPDR_FLOATING(GPIOF_I2C2_SDA) | \
+ PIN_PUPDR_FLOATING(GPIOF_I2C2_SCL) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN2) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN3) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN4) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN5) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN6) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN7) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN8) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN9) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN10) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN11) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN12) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN13) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN14) | \
+ PIN_PUPDR_PULLUP(GPIOF_PIN15))
+#define VAL_GPIOF_ODR (PIN_ODR_HIGH(GPIOF_I2C2_SDA) | \
+ PIN_ODR_HIGH(GPIOF_I2C2_SCL) | \
+ PIN_ODR_HIGH(GPIOF_PIN2) | \
+ PIN_ODR_HIGH(GPIOF_PIN3) | \
+ PIN_ODR_HIGH(GPIOF_PIN4) | \
+ PIN_ODR_HIGH(GPIOF_PIN5) | \
+ PIN_ODR_HIGH(GPIOF_PIN6) | \
+ PIN_ODR_HIGH(GPIOF_PIN7) | \
+ PIN_ODR_HIGH(GPIOF_PIN8) | \
+ PIN_ODR_HIGH(GPIOF_PIN9) | \
+ PIN_ODR_HIGH(GPIOF_PIN10) | \
+ PIN_ODR_HIGH(GPIOF_PIN11) | \
+ PIN_ODR_HIGH(GPIOF_PIN12) | \
+ PIN_ODR_HIGH(GPIOF_PIN13) | \
+ PIN_ODR_HIGH(GPIOF_PIN14) | \
+ PIN_ODR_HIGH(GPIOF_PIN15))
+#define VAL_GPIOF_AFRL (PIN_AFIO_AF(GPIOF_I2C2_SDA, 0) | \
+ PIN_AFIO_AF(GPIOF_I2C2_SCL, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN2, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN3, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN4, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN5, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN6, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN7, 0))
+#define VAL_GPIOF_AFRH (PIN_AFIO_AF(GPIOF_PIN8, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN9, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN10, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN11, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN12, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN13, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN14, 0) | \
+ PIN_AFIO_AF(GPIOF_PIN15, 0))
+
+/*
+ * GPIOG setup:
+ *
+ * PG0 - PIN0 (input pullup).
+ * PG1 - PIN1 (input pullup).
+ * PG2 - PIN2 (input pullup).
+ * PG3 - PIN3 (input pullup).
+ * PG4 - PIN4 (input pullup).
+ * PG5 - PIN5 (input pullup).
+ * PG6 - PIN6 (input pullup).
+ * PG7 - PIN7 (input pullup).
+ * PG8 - PIN8 (input pullup).
+ * PG9 - PIN9 (input pullup).
+ * PG10 - PIN10 (input pullup).
+ * PG11 - PIN11 (input pullup).
+ * PG12 - PIN12 (input pullup).
+ * PG13 - PIN13 (input pullup).
+ * PG14 - PIN14 (input pullup).
+ * PG15 - PIN15 (input pullup).
+ */
+#define VAL_GPIOG_MODER (PIN_MODE_INPUT(GPIOG_PIN0) | \
+ PIN_MODE_INPUT(GPIOG_PIN1) | \
+ PIN_MODE_INPUT(GPIOG_PIN2) | \
+ PIN_MODE_INPUT(GPIOG_PIN3) | \
+ PIN_MODE_INPUT(GPIOG_PIN4) | \
+ PIN_MODE_INPUT(GPIOG_PIN5) | \
+ PIN_MODE_INPUT(GPIOG_PIN6) | \
+ PIN_MODE_INPUT(GPIOG_PIN7) | \
+ PIN_MODE_INPUT(GPIOG_PIN8) | \
+ PIN_MODE_INPUT(GPIOG_PIN9) | \
+ PIN_MODE_INPUT(GPIOG_PIN10) | \
+ PIN_MODE_INPUT(GPIOG_PIN11) | \
+ PIN_MODE_INPUT(GPIOG_PIN12) | \
+ PIN_MODE_INPUT(GPIOG_PIN13) | \
+ PIN_MODE_INPUT(GPIOG_PIN14) | \
+ PIN_MODE_INPUT(GPIOG_PIN15))
+#define VAL_GPIOG_OTYPER (PIN_OTYPE_PUSHPULL(GPIOG_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOG_PIN15))
+#define VAL_GPIOG_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOG_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOG_PIN15))
+#define VAL_GPIOG_PUPDR (PIN_PUPDR_PULLUP(GPIOG_PIN0) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN1) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN2) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN3) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN4) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN5) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN6) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN7) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN8) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN9) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN10) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN11) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN12) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN13) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN14) | \
+ PIN_PUPDR_PULLUP(GPIOG_PIN15))
+#define VAL_GPIOG_ODR (PIN_ODR_HIGH(GPIOG_PIN0) | \
+ PIN_ODR_HIGH(GPIOG_PIN1) | \
+ PIN_ODR_HIGH(GPIOG_PIN2) | \
+ PIN_ODR_HIGH(GPIOG_PIN3) | \
+ PIN_ODR_HIGH(GPIOG_PIN4) | \
+ PIN_ODR_HIGH(GPIOG_PIN5) | \
+ PIN_ODR_HIGH(GPIOG_PIN6) | \
+ PIN_ODR_HIGH(GPIOG_PIN7) | \
+ PIN_ODR_HIGH(GPIOG_PIN8) | \
+ PIN_ODR_HIGH(GPIOG_PIN9) | \
+ PIN_ODR_HIGH(GPIOG_PIN10) | \
+ PIN_ODR_HIGH(GPIOG_PIN11) | \
+ PIN_ODR_HIGH(GPIOG_PIN12) | \
+ PIN_ODR_HIGH(GPIOG_PIN13) | \
+ PIN_ODR_HIGH(GPIOG_PIN14) | \
+ PIN_ODR_HIGH(GPIOG_PIN15))
+#define VAL_GPIOG_AFRL (PIN_AFIO_AF(GPIOG_PIN0, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN1, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN2, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN3, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN4, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN5, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN6, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN7, 0))
+#define VAL_GPIOG_AFRH (PIN_AFIO_AF(GPIOG_PIN8, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN9, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN10, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN11, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN12, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN13, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN14, 0) | \
+ PIN_AFIO_AF(GPIOG_PIN15, 0))
+
+/*
+ * GPIOH setup:
+ *
+ * PH0 - PIN0 (input pullup).
+ * PH1 - PIN1 (input pullup).
+ * PH2 - PIN2 (input pullup).
+ * PH3 - PIN3 (input pullup).
+ * PH4 - PIN4 (input pullup).
+ * PH5 - PIN5 (input pullup).
+ * PH6 - PIN6 (input pullup).
+ * PH7 - PIN7 (input pullup).
+ * PH8 - PIN8 (input pullup).
+ * PH9 - PIN9 (input pullup).
+ * PH10 - PIN10 (input pullup).
+ * PH11 - PIN11 (input pullup).
+ * PH12 - PIN12 (input pullup).
+ * PH13 - PIN13 (input pullup).
+ * PH14 - PIN14 (input pullup).
+ * PH15 - PIN15 (input pullup).
+ */
+#define VAL_GPIOH_MODER (PIN_MODE_INPUT(GPIOH_PIN0) | \
+ PIN_MODE_INPUT(GPIOH_PIN1) | \
+ PIN_MODE_INPUT(GPIOH_PIN2) | \
+ PIN_MODE_INPUT(GPIOH_PIN3) | \
+ PIN_MODE_INPUT(GPIOH_PIN4) | \
+ PIN_MODE_INPUT(GPIOH_PIN5) | \
+ PIN_MODE_INPUT(GPIOH_PIN6) | \
+ PIN_MODE_INPUT(GPIOH_PIN7) | \
+ PIN_MODE_INPUT(GPIOH_PIN8) | \
+ PIN_MODE_INPUT(GPIOH_PIN9) | \
+ PIN_MODE_INPUT(GPIOH_PIN10) | \
+ PIN_MODE_INPUT(GPIOH_PIN11) | \
+ PIN_MODE_INPUT(GPIOH_PIN12) | \
+ PIN_MODE_INPUT(GPIOH_PIN13) | \
+ PIN_MODE_INPUT(GPIOH_PIN14) | \
+ PIN_MODE_INPUT(GPIOH_PIN15))
+#define VAL_GPIOH_OTYPER (PIN_OTYPE_PUSHPULL(GPIOH_PIN0) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN1) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN2) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN3) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN4) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN5) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN6) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN7) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN8) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN9) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN10) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN11) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN12) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN13) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN14) | \
+ PIN_OTYPE_PUSHPULL(GPIOH_PIN15))
+#define VAL_GPIOH_OSPEEDR (PIN_OSPEED_VERYLOW(GPIOH_PIN0) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN1) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN2) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN3) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN4) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN5) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN6) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN7) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN8) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN9) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN10) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN11) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN12) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN13) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN14) | \
+ PIN_OSPEED_VERYLOW(GPIOH_PIN15))
+#define VAL_GPIOH_PUPDR (PIN_PUPDR_PULLUP(GPIOH_PIN0) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN1) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN2) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN3) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN4) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN5) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN6) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN7) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN8) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN9) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN10) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN11) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN12) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN13) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN14) | \
+ PIN_PUPDR_PULLUP(GPIOH_PIN15))
+#define VAL_GPIOH_ODR (PIN_ODR_HIGH(GPIOH_PIN0) | \
+ PIN_ODR_HIGH(GPIOH_PIN1) | \
+ PIN_ODR_HIGH(GPIOH_PIN2) | \
+ PIN_ODR_HIGH(GPIOH_PIN3) | \
+ PIN_ODR_HIGH(GPIOH_PIN4) | \
+ PIN_ODR_HIGH(GPIOH_PIN5) | \
+ PIN_ODR_HIGH(GPIOH_PIN6) | \
+ PIN_ODR_HIGH(GPIOH_PIN7) | \
+ PIN_ODR_HIGH(GPIOH_PIN8) | \
+ PIN_ODR_HIGH(GPIOH_PIN9) | \
+ PIN_ODR_HIGH(GPIOH_PIN10) | \
+ PIN_ODR_HIGH(GPIOH_PIN11) | \
+ PIN_ODR_HIGH(GPIOH_PIN12) | \
+ PIN_ODR_HIGH(GPIOH_PIN13) | \
+ PIN_ODR_HIGH(GPIOH_PIN14) | \
+ PIN_ODR_HIGH(GPIOH_PIN15))
+#define VAL_GPIOH_AFRL (PIN_AFIO_AF(GPIOH_PIN0, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN1, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN2, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN3, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN4, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN5, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN6, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN7, 0))
+#define VAL_GPIOH_AFRH (PIN_AFIO_AF(GPIOH_PIN8, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN9, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN10, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN11, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN12, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN13, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN14, 0) | \
+ PIN_AFIO_AF(GPIOH_PIN15, 0))
+
+
+/*
+ * USB bus activation macro, required by the USB driver.
+ */
+// #define usb_lld_connect_bus(usbp)
+#define usb_lld_connect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_ALTERNATE(14)))
+// #define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT)
+/*
+ * USB bus de-activation macro, required by the USB driver.
+ */
+// #define usb_lld_disconnect_bus(usbp)
+#define usb_lld_disconnect_bus(usbp) (palSetPadMode(GPIOA, GPIOA_USB_DP, PAL_MODE_OUTPUT_PUSHPULL)); palClearPad(GPIOA, GPIOA_USB_DP)
+// #define usb_lld_disconnect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); palClearPad(GPIOA, 12)
+
+#if !defined(_FROM_ASM_)
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void boardInit(void);
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk
new file mode 100644
index 0000000000..43377629a3
--- /dev/null
+++ b/keyboards/hadron/ver3/boards/GENERIC_STM32_F303XC/board.mk
@@ -0,0 +1,5 @@
+# List of all the board related files.
+BOARDSRC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC/board.c
+
+# Required include directories
+BOARDINC = $(BOARD_PATH)/boards/GENERIC_STM32_F303XC
diff --git a/keyboards/hadron/ver3/bootloader_defs.h b/keyboards/hadron/ver3/bootloader_defs.h
new file mode 100644
index 0000000000..3b0e9d20a6
--- /dev/null
+++ b/keyboards/hadron/ver3/bootloader_defs.h
@@ -0,0 +1,7 @@
+/* Address for jumping to bootloader on STM32 chips. */
+/* It is chip dependent, the correct number can be looked up here:
+ * http://www.st.com/web/en/resource/technical/document/application_note/CD00167594.pdf
+ * This also requires a patch to chibios:
+ * <tmk_dir>/tmk_core/tool/chibios/ch-bootloader-jump.patch
+ */
+#define STM32_BOOTLOADER_ADDRESS 0x1FFFD800
diff --git a/keyboards/hadron/ver3/chconf.h b/keyboards/hadron/ver3/chconf.h
new file mode 100644
index 0000000000..1d9f12ff1f
--- /dev/null
+++ b/keyboards/hadron/ver3/chconf.h
@@ -0,0 +1,520 @@
+/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef CHCONF_H
+#define CHCONF_H
+
+#define _CHIBIOS_RT_CONF_
+
+/*===========================================================================*/
+/**
+ * @name System timers settings
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System time counter resolution.
+ * @note Allowed values are 16 or 32 bits.
+ */
+#define CH_CFG_ST_RESOLUTION 32
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#define CH_CFG_ST_FREQUENCY 100000
+
+/**
+ * @brief Time delta constant for the tick-less mode.
+ * @note If this value is zero then the system uses the classic
+ * periodic tick. This value represents the minimum number
+ * of ticks that is safe to specify in a timeout directive.
+ * The value one is not valid, timeouts are rounded up to
+ * this value.
+ */
+#define CH_CFG_ST_TIMEDELTA 2
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ * @note The round robin preemption is not supported in tickless mode and
+ * must be set to zero in that case.
+ */
+#define CH_CFG_TIME_QUANTUM 0
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_CFG_USE_MEMCORE.
+ */
+#define CH_CFG_MEMCORE_SIZE 0
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread. The application @p main()
+ * function becomes the idle thread and must implement an
+ * infinite loop.
+ */
+#define CH_CFG_NO_IDLE_THREAD FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_OPTIMIZE_SPEED TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Time Measurement APIs.
+ * @details If enabled then the time measurement APIs are included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_TM TRUE
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_REGISTRY TRUE
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_WAITEXIT TRUE
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_SEMAPHORES TRUE
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_SEMAPHORES_PRIORITY FALSE
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MUTEXES TRUE
+
+/**
+ * @brief Enables recursive behavior on mutexes.
+ * @note Recursive mutexes are heavier and have an increased
+ * memory footprint.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_MUTEXES_RECURSIVE FALSE
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MUTEXES.
+ */
+#define CH_CFG_USE_CONDVARS TRUE
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_CONDVARS.
+ */
+#define CH_CFG_USE_CONDVARS_TIMEOUT TRUE
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_EVENTS TRUE
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_EVENTS.
+ */
+#define CH_CFG_USE_EVENTS_TIMEOUT TRUE
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MESSAGES TRUE
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special
+ * requirements.
+ * @note Requires @p CH_CFG_USE_MESSAGES.
+ */
+#define CH_CFG_USE_MESSAGES_PRIORITY TRUE
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_SEMAPHORES.
+ */
+#define CH_CFG_USE_MAILBOXES TRUE
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMCORE TRUE
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_MEMCORE and either @p CH_CFG_USE_MUTEXES or
+ * @p CH_CFG_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#define CH_CFG_USE_HEAP TRUE
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#define CH_CFG_USE_MEMPOOLS TRUE
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_CFG_USE_WAITEXIT.
+ * @note Requires @p CH_CFG_USE_HEAP and/or @p CH_CFG_USE_MEMPOOLS.
+ */
+#define CH_CFG_USE_DYNAMIC TRUE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, kernel statistics.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_STATISTICS FALSE
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_SYSTEM_STATE_CHECK FALSE
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_CHECKS FALSE
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_ENABLE_ASSERTS FALSE
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the trace buffer is activated.
+ *
+ * @note The default is @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_MASK CH_DBG_TRACE_MASK_DISABLED
+
+/**
+ * @brief Trace buffer entries.
+ * @note The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
+ * different from @p CH_DBG_TRACE_MASK_DISABLED.
+ */
+#define CH_DBG_TRACE_BUFFER_SIZE 128
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#define CH_DBG_ENABLE_STACK_CHECK TRUE
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#define CH_DBG_FILL_THREADS FALSE
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p thread_t structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p FALSE.
+ * @note This debug option is not currently compatible with the
+ * tickless mode.
+ */
+#define CH_DBG_THREADS_PROFILING FALSE
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p thread_t structure.
+ */
+#define CH_CFG_THREAD_EXTRA_FIELDS \
+ /* Add threads custom fields here.*/
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitly from all
+ * the threads creation APIs.
+ */
+#define CH_CFG_THREAD_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ */
+#define CH_CFG_THREAD_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* Context switch code here.*/ \
+}
+
+/**
+ * @brief ISR enter hook.
+ */
+#define CH_CFG_IRQ_PROLOGUE_HOOK() { \
+ /* IRQ prologue code here.*/ \
+}
+
+/**
+ * @brief ISR exit hook.
+ */
+#define CH_CFG_IRQ_EPILOGUE_HOOK() { \
+ /* IRQ epilogue code here.*/ \
+}
+
+/**
+ * @brief Idle thread enter hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to activate a power saving mode.
+ */
+#define CH_CFG_IDLE_ENTER_HOOK() { \
+ /* Idle-enter code here.*/ \
+}
+
+/**
+ * @brief Idle thread leave hook.
+ * @note This hook is invoked within a critical zone, no OS functions
+ * should be invoked from here.
+ * @note This macro can be used to deactivate a power saving mode.
+ */
+#define CH_CFG_IDLE_LEAVE_HOOK() { \
+ /* Idle-leave code here.*/ \
+}
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#define CH_CFG_IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#define CH_CFG_SYSTEM_TICK_HOOK() { \
+ /* System tick event code here.*/ \
+}
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#define CH_CFG_SYSTEM_HALT_HOOK(reason) { \
+ /* System halt code here.*/ \
+}
+
+/**
+ * @brief Trace hook.
+ * @details This hook is invoked each time a new record is written in the
+ * trace buffer.
+ */
+#define CH_CFG_TRACE_HOOK(tep) { \
+ /* Trace code here.*/ \
+}
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* CHCONF_H */
+
+/** @} */
diff --git a/keyboards/hadron/ver3/config.h b/keyboards/hadron/ver3/config.h
new file mode 100644
index 0000000000..11288f7a57
--- /dev/null
+++ b/keyboards/hadron/ver3/config.h
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef REV3_CONFIG_H
+#define REV3_CONFIG_H
+
+/* USB Device descriptor parameter */
+#define DEVICE_VER 0x0003
+
+#undef MATRIX_ROWS
+#undef MATRIX_COLS
+/* key matrix size */
+#define MATRIX_ROWS 5
+#define MATRIX_COLS 15
+
+
+//Audio
+#undef AUDIO_VOICES
+#undef C6_AUDIO
+
+#ifdef AUDIO_ENABLE
+ #define STARTUP_SONG SONG(PLANCK_SOUND)
+ // #define STARTUP_SONG SONG(NO_SOUND)
+
+ #define DEFAULT_LAYER_SONGS { SONG(QWERTY_SOUND), \
+ SONG(COLEMAK_SOUND), \
+ SONG(DVORAK_SOUND) \
+ }
+#define AUDIO_CLICKY
+ /* to enable clicky on startup */
+ //#define AUDIO_CLICKY_ON
+#define AUDIO_CLICKY_FREQ_RANDOMNESS 1.5f
+#endif
+
+//configure qwiic micro_oled driver for the 128x32 oled
+#ifdef QWIIC_MICRO_OLED_ENABLE
+
+#undef I2C_ADDRESS_SA0_1
+#define I2C_ADDRESS_SA0_1 0b0111100
+#define LCDWIDTH 128
+#define LCDHEIGHT 32
+#define micro_oled_rotate_180
+
+#endif
+/*
+ * Keyboard Matrix Assignments
+ *
+ * Change this to how you wired your keyboard
+ * COLS: AVR pins used for columns, left to right
+ * ROWS: AVR pins used for rows, top to bottom
+ * DIODE_DIRECTION: COL2ROW = COL = Anode (+), ROW = Cathode (-, marked on diode)
+ * ROW2COL = ROW = Anode (+), COL = Cathode (-, marked on diode)
+ *
+*/
+
+/* Debounce reduces chatter (unintended double-presses) - set 0 if debouncing is not needed */
+#define DEBOUNCE 6
+
+/* Mechanical locking support. Use KC_LCAP, KC_LNUM or KC_LSCR instead in keymap */
+//#define LOCKING_SUPPORT_ENABLE
+/* Locking resynchronize hack */
+//#define LOCKING_RESYNC_ENABLE
+
+/*
+ * Force NKRO
+ *
+ * Force NKRO (nKey Rollover) to be enabled by default, regardless of the saved
+ * state in the bootmagic EEPROM settings. (Note that NKRO must be enabled in the
+ * makefile for this to work.)
+ *
+ * If forced on, NKRO can be disabled via magic key (default = LShift+RShift+N)
+ * until the next keyboard reset.
+ *
+ * NKRO may prevent your keystrokes from being detected in the BIOS, but it is
+ * fully operational during normal computer usage.
+ *
+ * For a less heavy-handed approach, enable NKRO via magic key (LShift+RShift+N)
+ * or via bootmagic (hold SPACE+N while plugging in the keyboard). Once set by
+ * bootmagic, NKRO mode will always be enabled until it is toggled again during a
+ * power-up.
+ *
+ */
+//#define FORCE_NKRO
+
+/* key combination for magic key command */
+#define IS_COMMAND() ( \
+ keyboard_report->mods == (MOD_BIT(KC_LSHIFT) | MOD_BIT(KC_RSHIFT)) \
+)
+
+/*
+ * Feature disable options
+ * These options are also useful to firmware size reduction.
+ */
+
+/* disable debug print */
+//#define NO_DEBUG
+
+/* disable print */
+//#define NO_PRINT
+
+/* disable action features */
+//#define NO_ACTION_LAYER
+//#define NO_ACTION_TAPPING
+//#define NO_ACTION_ONESHOT
+//#define NO_ACTION_MACRO
+//#define NO_ACTION_FUNCTION
+/*
+ * MIDI options
+ */
+
+/* Prevent use of disabled MIDI features in the keymap */
+//#define MIDI_ENABLE_STRICT 1
+
+/* enable basic MIDI features:
+ - MIDI notes can be sent when in Music mode is on
+*/
+
+#define MIDI_BASIC
+
+/* enable advanced MIDI features:
+ - MIDI notes can be added to the keymap
+ - Octave shift and transpose
+ - Virtual sustain, portamento, and modulation wheel
+ - etc.
+*/
+//#define MIDI_ADVANCED
+
+/* override number of MIDI tone keycodes (each octave adds 12 keycodes and allocates 12 bytes) */
+//#define MIDI_TONE_KEYCODE_OCTAVES 2
+
+/* Haptic Driver initialization settings
+ * Feedback Control Settings */
+#define FB_ERM_LRA 1 /* For ERM:0 or LRA:1*/
+#define FB_BRAKEFACTOR 6 /* For 1x:0, 2x:1, 3x:2, 4x:3, 6x:4, 8x:5, 16x:6, Disable Braking:7 */
+#define FB_LOOPGAIN 1 /* For Low:0, Medium:1, High:2, Very High:3 */
+
+#define RATED_VOLTAGE 2
+#define V_RMS 2.0
+#define V_PEAK 2.85
+#define F_LRA 205
+/* Library Selection */
+#define LIB_SELECTION 6 /* For Empty:0' TS2200 library A to D:1-5, LRA Library: 6 */
+
+/* Control 1 register settings */
+#define DRIVE_TIME 25
+#define AC_COUPLE 0
+#define STARTUP_BOOST 1
+
+/* Control 2 Settings */
+#define BIDIR_INPUT 1
+#define BRAKE_STAB 1 /* Loopgain is reduced when braking is almost complete to improve stability */
+#define SAMPLE_TIME 3
+#define BLANKING_TIME 1
+#define IDISS_TIME 1
+
+/* Control 3 settings */
+#define NG_THRESH 2
+#define ERM_OPEN_LOOP 1
+#define SUPPLY_COMP_DIS 0
+#define DATA_FORMAT_RTO 0
+#define LRA_DRIVE_MODE 0
+#define N_PWM_ANALOG 0
+#define LRA_OPEN_LOOP 0
+/* Control 4 settings */
+#define ZC_DET_TIME 0
+#define AUTO_CAL_TIME 3
+
+//#define WS2812_LED_N 2
+//#define RGBLED_NUM WS2812_LED_N
+//#define WS2812_TIM_N 2
+//#define WS2812_TIM_CH 2
+//#define PORT_WS2812 GPIOA
+//#define PIN_WS2812 15
+//#define WS2812_DMA_STREAM STM32_DMA1_STREAM2 // DMA stream for TIMx_UP (look up in reference manual under DMA Channel selection)
+//#define WS2812_DMA_CHANNEL 7 // DMA channel for TIMx_UP
+//#define WS2812_EXTERNAL_PULLUP
+
+#endif
diff --git a/keyboards/hadron/ver3/halconf.h b/keyboards/hadron/ver3/halconf.h
new file mode 100644
index 0000000000..c3e0cbb728
--- /dev/null
+++ b/keyboards/hadron/ver3/halconf.h
@@ -0,0 +1,388 @@
+/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef HALCONF_H
+#define HALCONF_H
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC TRUE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT TRUE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C TRUE
+#endif
+
+/**
+ * @brief Enables the I2S subsystem.
+ */
+#if !defined(HAL_USE_I2S) || defined(__DOXYGEN__)
+#define HAL_USE_I2S FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the QSPI subsystem.
+ */
+#if !defined(HAL_USE_QSPI) || defined(__DOXYGEN__)
+#define HAL_USE_QSPI FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB TRUE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB TRUE
+#endif
+
+/**
+ * @brief Enables the WDG subsystem.
+ */
+#if !defined(HAL_USE_WDG) || defined(__DOXYGEN__)
+#define HAL_USE_WDG FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY FALSE
+#endif
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 16 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SERIAL_USB driver related setting. */
+/*===========================================================================*/
+
+/**
+ * @brief Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ * the USB data endpoint maximum packet size.
+ * @note The default is 256 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE 1
+#endif
+
+/**
+ * @brief Serial over USB number of buffers.
+ * @note The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER 2
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* UART driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT FALSE
+#endif
+
+/**
+ * @brief Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT TRUE
+#endif
+
+#endif /* HALCONF_H */
+
+/** @} */
diff --git a/keyboards/hadron/ver3/keymaps/default/config.h b/keyboards/hadron/ver3/keymaps/default/config.h
new file mode 100644
index 0000000000..6f70f09bee
--- /dev/null
+++ b/keyboards/hadron/ver3/keymaps/default/config.h
@@ -0,0 +1 @@
+#pragma once
diff --git a/keyboards/hadron/ver3/keymaps/default/keymap.c b/keyboards/hadron/ver3/keymaps/default/keymap.c
new file mode 100644
index 0000000000..11761b3210
--- /dev/null
+++ b/keyboards/hadron/ver3/keymaps/default/keymap.c
@@ -0,0 +1,295 @@
+#include QMK_KEYBOARD_H
+
+// Each layer gets a name for readability, which is then used in the keymap matrix below.
+// The underscores don't mean anything - you can have a layer called STUFF or any other name.
+// Layer names don't all need to be of the same length, obviously, and you can also skip them
+// entirely and just use numbers.
+#define _QWERTY 0
+#define _COLEMAK 1
+#define _DVORAK 2
+#define _LOWER 3
+#define _RAISE 4
+#define _MOUSECURSOR 8
+#define _ADJUST 16
+
+enum preonic_keycodes {
+ QWERTY = SAFE_RANGE,
+ COLEMAK,
+ DVORAK,
+ LOWER,
+ RAISE,
+ BACKLIT,
+ RGBLED_TOGGLE,
+ RGBLED_STEP_MODE,
+ RGBLED_INCREASE_HUE,
+ RGBLED_DECREASE_HUE,
+ RGBLED_INCREASE_SAT,
+ RGBLED_DECREASE_SAT,
+ RGBLED_INCREASE_VAL,
+ RGBLED_DECREASE_VAL,
+};
+
+enum macro_keycodes {
+ KC_DEMOMACRO,
+};
+
+// Fillers to make layering more clear
+#define _______ KC_TRNS
+#define XXXXXXX KC_NO
+// Custom macros
+#define CTL_ESC CTL_T(KC_ESC) // Tap for Esc, hold for Ctrl
+#define CTL_TTAB CTL_T(KC_TAB) // Tap for Esc, hold for Ctrl
+#define CTL_ENT CTL_T(KC_ENT) // Tap for Enter, hold for Ctrl
+#define SFT_ENT SFT_T(KC_ENT) // Tap for Enter, hold for Shift
+// Requires KC_TRNS/_______ for the trigger key in the destination layer
+#define LT_MC(kc) LT(_MOUSECURSOR, kc) // L-ayer T-ap M-ouse C-ursor
+#define LT_RAI(kc) LT(_RAISE, kc) // L-ayer T-ap to Raise
+#define DEMOMACRO M(KC_DEMOMACRO) // Sample for macros
+
+
+const uint16_t PROGMEM keymaps[][MATRIX_ROWS][MATRIX_COLS] = {
+
+/* Qwerty
+ * ,------+------+------+------+------+------------------------------------------------.
+ * | Esc | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | F10 | DEL |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+--------------------.
+ * | Tab | Q | W | E | R | T | 7 | 8 | 9 | Y | U | I | O | P | Bksp |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | CAPS | A | S | D | F | G | 4 | 5 | 6 | H | J | K | L | ;/Nav| ' |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | Shift| Z | X | C | V | B | 1 | 2 | 3 | N | M | , | . | / |Ctl/Et|
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | ` | Ctrl | Alt | GUI |Lower |Space | 0 | . | = |Space |Raise | Left | Down | Up |Right |
+ * `--------------------------------------------------------------------------------------------------------'
+ */
+[_QWERTY] = LAYOUT(
+ KC_ESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_DEL,\
+ KC_TAB, KC_Q, KC_W, KC_E, KC_R, KC_T, KC_P7, KC_P8, KC_P9, KC_Y, KC_U, KC_I, KC_O, KC_P, KC_BSPC, \
+ KC_CAPS, KC_A, KC_S, KC_D, KC_F, KC_G, KC_P4, KC_P5, KC_P6, KC_H, KC_J, KC_K, KC_L,LT_MC(KC_SCLN), KC_QUOT, \
+ KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_P1, KC_P2, KC_P3, KC_N, KC_M, KC_COMM,KC_DOT, KC_SLSH, CTL_ENT, \
+ KC_GRV, KC_LCTRL, KC_LGUI, KC_LALT, LOWER, KC_SPC, KC_P0, KC_DOT, KC_EQL, KC_SPC, RAISE, KC_LEFT,KC_DOWN, KC_UP, KC_RGHT \
+),
+
+/* Colemak
+ * ,------+------+------+------+------+------------------------------------------------.
+ * | Esc | F1 | F2 | F3 | F4 | F5 | F6 | F7 | F8 | F9 | 0 | - |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+--------------------.
+ * | Tab | Q | W | F | P | G | 7 | 8 | 9 | J | L | U | Y | ; | Bksp |
+ * |------+------+------+------+------+-------------+------+------+------+------+------+------+------+------|
+ * | CAPS | A | R | S | T | D | 4 | 5 | 6 | H | N | E | I | O | ' |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | Shift| Z | X | C | V | B | 1 | 2 | 3 | K | M | , | . | / |Ctl/Et|
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | ` | Ctrl | Alt | GUI |Lower |Space | 0 | . | = |Space |Raise | Left | Down | Up |Right |
+ * `--------------------------------------------------------------------------------------------------------'
+ */
+[_COLEMAK] = LAYOUT(
+ KC_ESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_DEL,\
+ KC_TAB, KC_Q, KC_W, KC_F, KC_P, KC_G, KC_P7, KC_P8, KC_P9, KC_J, KC_L, KC_U, KC_Y, KC_SCLN, KC_BSPC, \
+ KC_LCTRL, KC_A, KC_R, KC_S, KC_T, KC_D, KC_P4, KC_P5, KC_P6, KC_H, KC_N, KC_E, KC_I, LT_MC(KC_O), KC_QUOT, \
+ KC_LSFT, KC_Z, KC_X, KC_C, KC_V, KC_B, KC_P1, KC_P2, KC_P3, KC_K, KC_M, KC_COMM, KC_DOT, KC_SLSH, CTL_ENT, \
+ KC_GRV, KC_CAPS, KC_LGUI, KC_LALT, LOWER, KC_SPC, KC_P0, KC_DOT, KC_EQL, KC_SPC, RAISE, KC_LEFT, KC_DOWN, KC_UP, KC_RGHT \
+ ),
+
+/* Dvorak
+ * ,------+------+------+------+------+------------------------------------------------.
+ * | Esc | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 0 | - |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+--------------------.
+ * | Tab | " | , | . | P | Y | 7 | 8 | 9 | F | G | C | R | L | Bksp |
+ * |------+------+------+------+------+-------------+------+------+------+------+------+------+------+------|
+ * | Esc | A | O | E | U | I | 4 | 5 | 6 | D | H | T | N | S | / |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | Shift| ; | Q | J | K | X | 1 | 2 | 3 | B | M | W | V | Z |Ctl/Et|
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | ` | Ctrl | Alt | GUI |Lower |Space | 0 | . | = |Space |Raise | Left | Down | Up |Right |
+ * `--------------------------------------------------------------------------------------------------------'
+ */
+[_DVORAK] = LAYOUT(
+ KC_ESC, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_DEL,\
+ KC_TAB, KC_QUOT, KC_COMM, KC_DOT, KC_P, KC_Y, KC_P7, KC_P8, KC_P9, KC_F, KC_G, KC_C, KC_R, KC_L, KC_BSPC, \
+ KC_LCTL, KC_A, KC_O, KC_E, KC_U, KC_I, KC_P4, KC_P5, KC_P6, KC_D, KC_H, KC_T, KC_N, LT_MC(KC_S), KC_SLSH, \
+ KC_LSFT, KC_SCLN, KC_Q, KC_J, KC_K, KC_X, KC_P1, KC_P2, KC_P3, KC_B, KC_M, KC_W, KC_V, KC_Z, CTL_ENT, \
+ KC_GRV, KC_LCTRL, KC_LGUI, KC_LALT, LOWER, KC_SPC, KC_P0, KC_DOT, KC_EQL, KC_SPC, RAISE, KC_LEFT, KC_DOWN, KC_UP, KC_RGHT \
+),
+
+/* Lower
+ * ,------+------+------+------+------+------------------------------------------------.
+ * | ~ | ! | @ | # | $ | % | ^ | & | * | ( | ) | Bksp |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+--------------------.
+ * | ~ | ! | @ | # | $ | % | | | | ^ | & | * | ( | ) | Del |
+ * |------+------+------+------+------+-------------+------+------+------+------+------+------+------+------|
+ * | | F1 | F2 | F3 | F4 | F5 | | | | F6 | _ | + | { | } | | |
+ * |------+------+------+------+------+------|------+------+------+------+------+------+------+------+------|
+ * | | F7 | F8 | F9 | F10 | F11 | | | | F12 |ISO ~ |ISO | | | | |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | | | | | | | | | | | | Next | Vol- | Vol+ | Play |
+ * `--------------------------------------------------------------------------------------------------------'
+ */
+[_LOWER] = LAYOUT(
+ KC_TILD, KC_EXLM, KC_AT, KC_HASH, KC_DLR, KC_PERC, KC_CIRC, KC_AMPR, KC_ASTR, KC_LPRN, KC_RPRN, KC_BSPC, \
+ KC_TILD, KC_EXLM, KC_AT, KC_HASH, KC_DLR, KC_PERC, _______, _______, _______, KC_CIRC, KC_AMPR, KC_ASTR, KC_LPRN, KC_RPRN, KC_DEL, \
+ _______, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, _______, _______, _______, KC_F6, KC_UNDS, KC_PLUS, KC_LBRC, KC_RBRC, KC_PIPE, \
+ _______, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, _______, _______, _______, KC_F12,S(KC_NUHS),S(KC_NUBS),_______,_______, _______, \
+ _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, KC_MNXT, KC_VOLD, KC_VOLU, KC_MPLY \
+),
+
+/* Raise
+ * ,------+------+------+------+------+------------------------------------------------.
+ * | Esc | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 0 | - |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+--------------------.
+ * | ` | 1 | 2 | 3 | 4 | 5 | | | | 6 | 7 | 8 | 9 | 0 | Del |
+ * |------+------+------+------+------+-------------+------+------+------+------+------+------+------+------|
+ * | Del | F1 | F2 | F3 | F4 | F5 | | | | F6 | - | = | [ | ] | \ |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | | F7 | F8 | F9 | F10 | F11 | | | | F12 |ISO # |ISO / | | | |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | | | | | | | | | | | | Next | Vol- | Vol+ | Play |
+ * `--------------------------------------------------------------------------------------------------------'
+ */
+[_RAISE] = LAYOUT(
+ KC_GRV, KC_1, KC_2, KC_3, KC_4, KC_5, KC_6, KC_7, KC_8, KC_9, KC_0, KC_BSPC, \
+ KC_GRV, KC_1, KC_2, KC_3, KC_4, KC_5, _______, _______, _______, KC_6, KC_7, KC_8, KC_9, KC_0, KC_DEL, \
+ KC_DEL, KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, _______, _______, _______, KC_F6, KC_MINS, KC_EQL, KC_LBRC, KC_RBRC, KC_BSLS, \
+ _______, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, _______, _______, _______, KC_F12, KC_NUHS, KC_NUBS, _______, _______, _______, \
+ _______, _______, _______, _______, _______, KC_SPC, _______, _______, _______, _______, _______, KC_MNXT, KC_VOLD, KC_VOLU, KC_MPLY \
+),
+
+/* Mouse Layer (semi-col)
+ * ,------+------+------+------+------+------------------------------------------------.
+ * | ACCL0| ACCL1| ACCL2| | | | | | | | | |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+--------------------.
+ * | | | | | | | | | Home | Wh_Up| WHL_L| M_Up | WHL_R| Macro| |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | | | | | | | | | End | Wh_Dn| M_Lft| M_Dn | M_Rt | | |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | | | | | | | | | | BTN2 | BTN3 | BTN4 | BTN5 | | |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | | | | | | BTN1 | | | | BTN1 | | | | | |
+ * `--------------------------------------------------------------------------------------------------------'
+ */
+
+[_MOUSECURSOR] = LAYOUT(
+ KC_ACL0, KC_ACL1, KC_ACL2, _______, _______, _______, _______, _______, _______, _______, _______, _______, \
+ _______, _______, _______, _______, _______, _______, _______, _______, KC_HOME, KC_PGUP, KC_WH_L, KC_MS_U, KC_WH_R,DEMOMACRO,_______, \
+ _______, _______, _______, _______, _______, _______, _______, _______, KC_END , KC_PGDN, KC_MS_L, KC_MS_D, KC_MS_R, _______, _______, \
+ _______, _______, _______, _______, _______, _______, _______, _______, _______, KC_BTN2, KC_BTN3, KC_BTN4, KC_BTN5, _______, _______, \
+ _______, _______, _______, _______, _______, KC_BTN1, _______, _______, _______, KC_BTN1, _______, _______, _______, _______, _______ \
+),
+
+/* Adjust (Lower + Raise)
+ * ,------+------+------+------+------+------------------------------------------------.
+ * | Esc | 1 | 2 | 3 | 4 | 5 | 6 | 7 | 8 | 9 | 0 | - |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+--------------------.
+ * | Reset|RGB TG|RGB ST|RGBH -|RGBH +|RGBS -|RGBS +|RGBV -|RGBV +| | | | | | Del |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | | | |Aud on|Audoff|AGnorm| | | |AGswap|Qwerty|Colemk| | | |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | |Voice-|Voice+|Mus on|Musoff| | | | | | | | BL + |BL ST |BL TG |
+ * |------+------+------+------+------+------+------+------+------+------+------+------+------+------+------|
+ * | | | | | | | | | | | | | | | |
+ * `--------------------------------------------------------------------------------------------------------'
+ */
+[_ADJUST] = LAYOUT(
+ KC_F1, KC_F2, KC_F3, KC_F4, KC_F5, KC_F6, KC_F7, KC_F8, KC_F9, KC_F10, KC_F11, KC_F12, \
+ RESET, RGB_TOG, RGB_MOD, RGB_HUI, RGB_HUD, RGB_SAI, RGB_SAD, RGB_VAI, RGB_VAD, _______, _______, _______, _______, _______, KC_DEL, \
+ _______, _______, _______, AU_ON, AU_OFF, AG_NORM, _______, _______, _______, AG_SWAP, QWERTY, COLEMAK, _______, _______, _______, \
+ _______, MUV_DE, MUV_IN, MU_ON, MU_OFF, MI_ON, MI_OFF, _______, _______, _______, _______, BL_DEC, BL_INC, BL_STEP, BL_TOGG, \
+ _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, _______, CK_RST, CK_DOWN, CK_UP, CK_TOGG\
+)
+
+
+
+};
+
+uint32_t layer_state_set_user(uint32_t state) {
+ return update_tri_layer_state(state, _LOWER, _RAISE, _ADJUST);
+}
+
+
+bool process_record_user(uint16_t keycode, keyrecord_t *record) {
+ switch (keycode) {
+ case QWERTY:
+ if (record->event.pressed) {
+ set_single_persistent_default_layer(_QWERTY);
+ }
+ return false;
+ break;
+ case COLEMAK:
+ if (record->event.pressed) {
+ set_single_persistent_default_layer(_COLEMAK);
+ }
+ return false;
+ break;
+ case LOWER:
+ if (record->event.pressed) {
+ //not sure how to have keyboard check mode and set it to a variable, so my work around
+ //uses another variable that would be set to true after the first time a reactive key is pressed.
+ layer_on(_LOWER);
+ } else {
+ layer_off(_LOWER);
+ }
+ return false;
+ break;
+ case RAISE:
+ if (record->event.pressed) {
+ //not sure how to have keyboard check mode and set it to a variable, so my work around
+ //uses another variable that would be set to true after the first time a reactive key is pressed.
+ layer_on(_RAISE);
+ } else {
+ layer_off(_RAISE);
+ }
+ return false;
+ break;
+ case BACKLIT:
+ if (record->event.pressed) {
+ register_code(KC_RSFT);
+ #ifdef BACKLIGHT_ENABLE
+ backlight_step();
+ #endif
+ } else {
+ unregister_code(KC_RSFT);
+ }
+ return false;
+ break;
+ }
+ return true;
+}
+
+bool music_mask_user(uint16_t keycode) {
+ switch (keycode) {
+ case RAISE:
+ case LOWER:
+ return false;
+ default:
+ return true;
+ }
+}
+
+
+/*
+ * Macro definition
+ */
+const macro_t *action_get_macro(keyrecord_t *record, uint8_t id, uint8_t opt)
+{
+ if (!eeconfig_is_enabled()) {
+ eeconfig_init();
+ }
+
+ switch (id) {
+ case KC_DEMOMACRO:
+ if (record->event.pressed){
+ return MACRO (I(1), T(H),T(E),T(L), T(L), T(O), T(SPACE), T(W), T(O), T(R), T(L), T(D), END);
+ }
+ }
+
+ return MACRO_NONE;
+}
+
+
+void matrix_init_user(void) {
+}
+
+
+void matrix_scan_user(void) {
+}
+
diff --git a/keyboards/hadron/ver3/keymaps/default/readme.md b/keyboards/hadron/ver3/keymaps/default/readme.md
new file mode 100644
index 0000000000..88b958ec42
--- /dev/null
+++ b/keyboards/hadron/ver3/keymaps/default/readme.md
@@ -0,0 +1,2 @@
+# The Default Hadron Layout
+
diff --git a/keyboards/hadron/ver3/keymaps/readme.md b/keyboards/hadron/ver3/keymaps/readme.md
new file mode 100644
index 0000000000..54fb5f6d9e
--- /dev/null
+++ b/keyboards/hadron/ver3/keymaps/readme.md
@@ -0,0 +1,23 @@
+# How to add your own keymap
+
+Folders can be named however you'd like (will be approved upon merging), or should follow the format with a preceding `_`:
+
+ _[ISO 3166-1 alpha-2 code*]_[layout variant]_[layout name/author]
+
+\* See full list: https://en.wikipedia.org/wiki/ISO_3166-1#Officially_assigned_code_elements
+
+and contain the following files:
+
+* `keymap.c`
+* `readme.md` *recommended*
+* `config.h` *optional*, found automatically when compiling
+* `Makefile` *optional*, found automatically when compling
+
+When adding your keymap to this list, keep it organised alphabetically (select list, edit->sort lines), and use this format:
+
+ * **folder_name** description
+
+# List of Planck keymaps
+
+* **default** default Planck layout
+* **cbbrowne** cbbrowne's Planck layout \ No newline at end of file
diff --git a/keyboards/hadron/ver3/matrix.c b/keyboards/hadron/ver3/matrix.c
new file mode 100644
index 0000000000..329d1328ab
--- /dev/null
+++ b/keyboards/hadron/ver3/matrix.c
@@ -0,0 +1,195 @@
+#include <string.h>
+#include "hal.h"
+#include "timer.h"
+#include "wait.h"
+#include "printf.h"
+#include "backlight.h"
+#include "matrix.h"
+#include "action.h"
+#include "keycode.h"
+
+/* matrix state(1:on, 0:off) */
+static matrix_row_t matrix[MATRIX_ROWS];
+static matrix_row_t matrix_debouncing[MATRIX_COLS];
+static bool debouncing = false;
+static uint16_t debouncing_time = 0;
+
+static uint8_t encoder_state = 0;
+static int8_t encoder_value = 0;
+static int8_t encoder_LUT[] = { 0, -1, 1, 0, 1, 0, 0, -1, -1, 0, 0, 1, 0, 1, -1, 0 };
+
+__attribute__ ((weak))
+void matrix_init_user(void) {}
+
+__attribute__ ((weak))
+void matrix_scan_user(void) {}
+
+__attribute__ ((weak))
+void matrix_init_kb(void) {
+ matrix_init_user();
+}
+
+__attribute__ ((weak))
+void matrix_scan_kb(void) {
+ matrix_scan_user();
+}
+
+void matrix_init(void) {
+ printf("matrix init\n");
+ //debug_matrix = true;
+
+ // encoder setup
+ palSetPadMode(GPIOB, 13, PAL_MODE_INPUT_PULLUP);
+ palSetPadMode(GPIOB, 14, PAL_MODE_INPUT_PULLUP);
+
+ encoder_state = (palReadPad(GPIOB, 13) << 0) | (palReadPad(GPIOB, 14) << 1);
+
+ // actual matrix setup
+ palSetPadMode(GPIOB, 8, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOB, 2, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOB, 10, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOA, 0, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOA, 1, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOA, 2, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOB, 0, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOA, 3, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOB, 1, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOA, 6, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOA, 7, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOB, 12, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOC, 13, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOB, 11, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(GPIOB, 9, PAL_MODE_OUTPUT_PUSHPULL);
+
+ palSetPadMode(GPIOC, 15, PAL_MODE_INPUT_PULLDOWN);
+ palSetPadMode(GPIOC, 14, PAL_MODE_INPUT_PULLDOWN);
+ palSetPadMode(GPIOA, 10, PAL_MODE_INPUT_PULLDOWN);
+ palSetPadMode(GPIOA, 9, PAL_MODE_INPUT_PULLDOWN);
+ palSetPadMode(GPIOA, 8, PAL_MODE_INPUT_PULLDOWN);
+
+
+ memset(matrix, 0, MATRIX_ROWS * sizeof(matrix_row_t));
+ memset(matrix_debouncing, 0, MATRIX_COLS * sizeof(matrix_row_t));
+
+
+ matrix_init_quantum();
+}
+
+__attribute__ ((weak))
+void encoder_update(bool clockwise) { }
+
+#ifndef ENCODER_RESOLUTION
+ #define ENCODER_RESOLUTION 4
+#endif
+
+uint8_t matrix_scan(void) {
+ // encoder on B13 and B14
+ encoder_state <<= 2;
+ encoder_state |= (palReadPad(GPIOB, 13) << 0) | (palReadPad(GPIOB, 14) << 1);
+ encoder_value += encoder_LUT[encoder_state & 0xF];
+ if (encoder_value >= ENCODER_RESOLUTION) {
+ encoder_update(0);
+ }
+ if (encoder_value <= -ENCODER_RESOLUTION) { // direction is arbitrary here, but this clockwise
+ encoder_update(1);
+ }
+ encoder_value %= ENCODER_RESOLUTION;
+
+ // actual matrix
+ for (int col = 0; col < MATRIX_COLS; col++) {
+ matrix_row_t data = 0;
+
+ // strobe col { PB8, PB2, PB10, PA0, PA1, PA2, PB0, PA3, PB1, PA6, PA7, PB1, PA6, PA7, PB12, PC3, PB11, }
+ switch (col) {
+ case 0: palSetPad(GPIOB, 8); break;
+ case 1: palSetPad(GPIOB, 2); break;
+ case 2: palSetPad(GPIOB, 10); break;
+ case 3: palSetPad(GPIOA, 0); break;
+ case 4: palSetPad(GPIOA, 1); break;
+ case 5: palSetPad(GPIOA, 2); break;
+ case 6: palSetPad(GPIOB, 0); break;
+ case 7: palSetPad(GPIOA, 3); break;
+ case 8: palSetPad(GPIOB, 1); break;
+ case 9: palSetPad(GPIOA, 6); break;
+ case 10: palSetPad(GPIOA, 7); break;
+ case 11: palSetPad(GPIOB, 12); break;
+ case 12: palSetPad(GPIOC, 13); break;
+ case 13: palSetPad(GPIOB, 11); break;
+ case 14: palSetPad(GPIOB, 9); break;
+ }
+
+ // need wait to settle pin state
+ wait_us(20);
+
+ // read row data { PC15, PC14, PA10, PA9, PA8 }
+ data = (
+ (palReadPad(GPIOC, 15) << 0 ) |
+ (palReadPad(GPIOC, 14) << 1 ) |
+ (palReadPad(GPIOA, 10) << 2 ) |
+ (palReadPad(GPIOA, 9) << 3 ) |
+ (palReadPad(GPIOA, 8) << 4 )
+ );
+
+ // unstrobe col { PB8, PB2, PB10, PA0, PA1, PA2, PB0, PA3, PB1, PA6, PA7, PB1, PA6, PA7, PB12, PC3, PB11, }
+ switch (col) {
+ case 0: palClearPad(GPIOB, 8); break;
+ case 1: palClearPad(GPIOB, 2); break;
+ case 2: palClearPad(GPIOB, 10); break;
+ case 3: palClearPad(GPIOA, 0); break;
+ case 4: palClearPad(GPIOA, 1); break;
+ case 5: palClearPad(GPIOA, 2); break;
+ case 6: palClearPad(GPIOB, 0); break;
+ case 7: palClearPad(GPIOA, 3); break;
+ case 8: palClearPad(GPIOB, 1); break;
+ case 9: palClearPad(GPIOA, 6); break;
+ case 10: palClearPad(GPIOA, 7); break;
+ case 11: palClearPad(GPIOB, 12); break;
+ case 12: palClearPad(GPIOC, 13); break;
+ case 13: palClearPad(GPIOB, 11); break;
+ case 14: palClearPad(GPIOB, 9); break;
+ }
+
+ if (matrix_debouncing[col] != data) {
+ matrix_debouncing[col] = data;
+ debouncing = true;
+ debouncing_time = timer_read();
+ }
+ }
+
+ if (debouncing && timer_elapsed(debouncing_time) > DEBOUNCE) {
+ for (int row = 0; row < MATRIX_ROWS; row++) {
+ matrix[row] = 0;
+ for (int col = 0; col < MATRIX_COLS; col++) {
+ matrix[row] |= ((matrix_debouncing[col] & (1 << row) ? 1 : 0) << col);
+ }
+ }
+ debouncing = false;
+ }
+
+ matrix_scan_quantum();
+
+ return 1;
+}
+
+bool matrix_is_on(uint8_t row, uint8_t col) {
+ return (matrix[row] & (1<<col));
+}
+
+matrix_row_t matrix_get_row(uint8_t row) {
+ return matrix[row];
+}
+
+void matrix_print(void) {
+ printf("\nr/c 01234567\n");
+ for (uint8_t row = 0; row < MATRIX_ROWS; row++) {
+ printf("%X0: ", row);
+ matrix_row_t data = matrix_get_row(row);
+ for (int col = 0; col < MATRIX_COLS; col++) {
+ if (data & (1<<col))
+ printf("1");
+ else
+ printf("0");
+ }
+ printf("\n");
+ }
+}
diff --git a/keyboards/hadron/ver3/mcuconf.h b/keyboards/hadron/ver3/mcuconf.h
new file mode 100644
index 0000000000..36f8ca2252
--- /dev/null
+++ b/keyboards/hadron/ver3/mcuconf.h
@@ -0,0 +1,257 @@
+/*
+ ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
+/*
+ * STM32F3xx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+#define STM32F3xx_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT FALSE
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
+#define STM32_HSI_ENABLED TRUE
+#define STM32_LSI_ENABLED TRUE
+#define STM32_HSE_ENABLED TRUE
+#define STM32_LSE_ENABLED FALSE
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_HSE
+#define STM32_PREDIV_VALUE 1
+#define STM32_PLLMUL_VALUE 9
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV2
+#define STM32_PPRE2 STM32_PPRE2_DIV2
+#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
+#define STM32_ADC12PRES STM32_ADC12PRES_DIV1
+#define STM32_ADC34PRES STM32_ADC34PRES_DIV1
+#define STM32_USART1SW STM32_USART1SW_PCLK
+#define STM32_USART2SW STM32_USART2SW_PCLK
+#define STM32_USART3SW STM32_USART3SW_PCLK
+#define STM32_UART4SW STM32_UART4SW_PCLK
+#define STM32_UART5SW STM32_UART5SW_PCLK
+#define STM32_I2C1SW STM32_I2C1SW_SYSCLK
+#define STM32_I2C2SW STM32_I2C2SW_SYSCLK
+#define STM32_TIM1SW STM32_TIM1SW_PCLK2
+#define STM32_TIM8SW STM32_TIM8SW_PCLK2
+#define STM32_RTCSEL STM32_RTCSEL_LSI
+#define STM32_USB_CLOCK_REQUIRED TRUE
+#define STM32_USBPRE STM32_USBPRE_DIV1P5
+
+#undef STM32_HSE_BYPASS
+// #error "oh no"
+// #endif
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_DUAL_MODE FALSE
+#define STM32_ADC_COMPACT_SAMPLES FALSE
+#define STM32_ADC_USE_ADC1 FALSE
+#define STM32_ADC_USE_ADC2 FALSE
+#define STM32_ADC_USE_ADC3 FALSE
+#define STM32_ADC_USE_ADC4 FALSE
+#define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1)
+#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 1)
+#define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 5)
+#define STM32_ADC_ADC4_DMA_STREAM STM32_DMA_STREAM_ID(2, 2)
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC2_DMA_PRIORITY 2
+#define STM32_ADC_ADC3_DMA_PRIORITY 2
+#define STM32_ADC_ADC4_DMA_PRIORITY 2
+#define STM32_ADC_ADC12_IRQ_PRIORITY 5
+#define STM32_ADC_ADC3_IRQ_PRIORITY 5
+#define STM32_ADC_ADC4_IRQ_PRIORITY 5
+#define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5
+#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5
+#define STM32_ADC_ADC3_DMA_IRQ_PRIORITY 5
+#define STM32_ADC_ADC4_DMA_IRQ_PRIORITY 5
+#define STM32_ADC_ADC12_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
+#define STM32_ADC_ADC34_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+
+/*
+ * DAC driver system settings.
+ */
+#define STM32_DAC_DUAL_MODE FALSE
+#define STM32_DAC_USE_DAC1_CH1 TRUE
+#define STM32_DAC_USE_DAC1_CH2 TRUE
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10
+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2
+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI21_22_29_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI30_32_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI33_IRQ_PRIORITY 6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM3 FALSE
+#define STM32_GPT_USE_TIM4 FALSE
+#define STM32_GPT_USE_TIM6 TRUE
+#define STM32_GPT_USE_TIM7 TRUE
+#define STM32_GPT_USE_TIM8 TRUE
+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
+#define STM32_GPT_TIM6_IRQ_PRIORITY 7
+#define STM32_GPT_TIM7_IRQ_PRIORITY 7
+#define STM32_GPT_TIM8_IRQ_PRIORITY 7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1 TRUE
+#define STM32_I2C_USE_I2C2 FALSE
+#define STM32_I2C_BUSY_TIMEOUT 50
+#define STM32_I2C_I2C1_IRQ_PRIORITY 10
+#define STM32_I2C_I2C2_IRQ_PRIORITY 10
+#define STM32_I2C_USE_DMA TRUE
+#define STM32_I2C_I2C1_DMA_PRIORITY 1
+#define STM32_I2C_I2C2_DMA_PRIORITY 1
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM3 FALSE
+#define STM32_ICU_USE_TIM4 FALSE
+#define STM32_ICU_USE_TIM8 FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
+#define STM32_ICU_TIM8_IRQ_PRIORITY 7
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED FALSE
+#define STM32_PWM_USE_TIM1 FALSE
+#define STM32_PWM_USE_TIM2 TRUE
+#define STM32_PWM_USE_TIM3 TRUE
+#define STM32_PWM_USE_TIM4 FALSE
+#define STM32_PWM_USE_TIM8 FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
+#define STM32_PWM_TIM8_IRQ_PRIORITY 7
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 TRUE
+#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 FALSE
+#define STM32_SPI_USE_SPI2 FALSE
+#define STM32_SPI_USE_SPI3 FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY 8
+#define STM32_ST_USE_TIMER 2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 FALSE
+#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY 12
+#define STM32_UART_USART2_IRQ_PRIORITY 12
+#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1 TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
+
+/*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG FALSE
+
+#endif /* MCUCONF_H */
diff --git a/keyboards/hadron/ver3/rev3.h b/keyboards/hadron/ver3/rev3.h
new file mode 100644
index 0000000000..2cbd53acef
--- /dev/null
+++ b/keyboards/hadron/ver3/rev3.h
@@ -0,0 +1,21 @@
+/* Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef REV3_H
+#define REV3_H
+
+#include "hadron.h"
+
+#endif \ No newline at end of file
diff --git a/keyboards/hadron/ver3/rules.mk b/keyboards/hadron/ver3/rules.mk
new file mode 100644
index 0000000000..8375efdd35
--- /dev/null
+++ b/keyboards/hadron/ver3/rules.mk
@@ -0,0 +1,57 @@
+# project specific files
+SRC = matrix.c
+
+## chip/board settings
+# - the next two should match the directories in
+# <chibios>/os/hal/ports/$(MCU_FAMILY)/$(MCU_SERIES)
+MCU_FAMILY = STM32
+MCU_SERIES = STM32F3xx
+
+# Linker script to use
+# - it should exist either in <chibios>/os/common/ports/ARMCMx/compilers/GCC/ld/
+# or <this_dir>/ld/
+MCU_LDSCRIPT = STM32F303xC
+
+# Startup code to use
+# - it should exist in <chibios>/os/common/startup/ARMCMx/compilers/GCC/mk/
+MCU_STARTUP = stm32f3xx
+
+# Board: it should exist either in <chibios>/os/hal/boards/
+# or <this_dir>/boards
+BOARD = GENERIC_STM32_F303XC
+
+# Cortex version
+MCU = cortex-m4
+
+# ARM version, CORTEX-M0/M1 are 6, CORTEX-M3/M4/M7 are 7
+ARMV = 7
+
+USE_FPU = yes
+
+# Vector table for application
+# 0x00000000-0x00001000 area is occupied by bootlaoder.*/
+# The CORTEX_VTOR... is needed only for MCHCK/Infinity KB
+# OPT_DEFS = -DCORTEX_VTOR_INIT=0x08005000
+OPT_DEFS =
+
+# Options to pass to dfu-util when flashing
+DFU_ARGS = -d 0483:df11 -a 0 -s 0x08000000:leave
+
+# Build Options
+# comment out to disable the options.
+#
+BACKLIGHT_ENABLE = no
+BOOTMAGIC_ENABLE = no # Virtual DIP switch configuration
+## (Note that for BOOTMAGIC on Teensy LC you have to use a custom .ld script.)
+MOUSEKEY_ENABLE = yes # Mouse keys
+EXTRAKEY_ENABLE = yes # Audio control and System control
+CONSOLE_ENABLE = no # Console for debug
+COMMAND_ENABLE = no # Commands for debug and configuration
+#SLEEP_LED_ENABLE = yes # Breathing sleep LED during USB suspend
+NKRO_ENABLE = yes # USB Nkey Rollover
+CUSTOM_MATRIX = yes # Custom matrix file
+AUDIO_ENABLE = yes
+RGBLIGHT_ENABLE = no
+HAPTIC_ENABLE = DRV2605L
+QWIIC_ENABLE += MICRO_OLED
+# SERIAL_LINK_ENABLE = yes
diff --git a/keyboards/hadron/ver3/ver3.c b/keyboards/hadron/ver3/ver3.c
new file mode 100644
index 0000000000..5e5e3e009f
--- /dev/null
+++ b/keyboards/hadron/ver3/ver3.c
@@ -0,0 +1,196 @@
+/* Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#include "ver3.h"
+#include "qwiic.h"
+#include "action_layer.h"
+#include "matrix.h"
+#include "DRV2605L.h"
+
+#ifdef QWIIC_MICRO_OLED_ENABLE
+
+/* screen off after this many milliseconds */
+#include "timer.h"
+#define ScreenOffInterval 60000 /* milliseconds */
+static uint16_t last_flush;
+
+volatile uint8_t led_numlock = false;
+volatile uint8_t led_capslock = false;
+volatile uint8_t led_scrolllock = false;
+
+static uint8_t layer;
+static bool queue_for_send = false;
+static uint8_t encoder_value = 32;
+
+__attribute__ ((weak))
+void draw_ui(void) {
+ clear_buffer();
+ last_flush = timer_read();
+ send_command(DISPLAYON);
+
+/* Layer indicator is 41 x 10 pixels */
+#define LAYER_INDICATOR_X 0
+#define LAYER_INDICATOR_Y 0
+
+ draw_string(LAYER_INDICATOR_X + 1, LAYER_INDICATOR_Y + 2, "LAYER", PIXEL_ON, NORM, 0);
+ draw_rect_filled_soft(LAYER_INDICATOR_X + 32, LAYER_INDICATOR_Y + 1, 9, 9, PIXEL_ON, NORM);
+ draw_char(LAYER_INDICATOR_X + 34, LAYER_INDICATOR_Y + 2, layer + 0x30, PIXEL_ON, XOR, 0);
+
+/* Matrix display is 19 x 9 pixels */
+#define MATRIX_DISPLAY_X 0
+#define MATRIX_DISPLAY_Y 18
+
+ for (uint8_t x = 0; x < MATRIX_ROWS; x++) {
+ for (uint8_t y = 0; y < MATRIX_COLS; y++) {
+ draw_pixel(MATRIX_DISPLAY_X + y + 2, MATRIX_DISPLAY_Y + x + 2,(matrix_get_row(x) & (1 << y)) > 0, NORM);
+ }
+ }
+ draw_rect_soft(MATRIX_DISPLAY_X, MATRIX_DISPLAY_Y, 19, 9, PIXEL_ON, NORM);
+ /* hadron oled location on thumbnail */
+ draw_rect_filled_soft(MATRIX_DISPLAY_X + 14, MATRIX_DISPLAY_Y + 2, 3, 1, PIXEL_ON, NORM);
+/*
+ draw_rect_soft(0, 13, 64, 6, PIXEL_ON, NORM);
+ draw_line_vert(encoder_value, 13, 6, PIXEL_ON, NORM);
+
+*/
+
+/* Mod display is 41 x 16 pixels */
+#define MOD_DISPLAY_X 30
+#define MOD_DISPLAY_Y 18
+
+ uint8_t mods = get_mods();
+ if (mods & MOD_LSFT) {
+ draw_rect_filled_soft(MOD_DISPLAY_X + 0, MOD_DISPLAY_Y, 5 + (1 * 6), 11, PIXEL_ON, NORM);
+ draw_string(MOD_DISPLAY_X + 3, MOD_DISPLAY_Y + 2, "S", PIXEL_OFF, NORM, 0);
+ } else {
+ draw_string(MOD_DISPLAY_X + 3, MOD_DISPLAY_Y + 2, "S", PIXEL_ON, NORM, 0);
+ }
+ if (mods & MOD_LCTL) {
+ draw_rect_filled_soft(MOD_DISPLAY_X + 10, MOD_DISPLAY_Y, 5 + (1 * 6), 11, PIXEL_ON, NORM);
+ draw_string(MOD_DISPLAY_X + 13, MOD_DISPLAY_Y + 2, "C", PIXEL_OFF, NORM, 0);
+ } else {
+ draw_string(MOD_DISPLAY_X + 13, MOD_DISPLAY_Y + 2, "C", PIXEL_ON, NORM, 0);
+ }
+ if (mods & MOD_LALT) {
+ draw_rect_filled_soft(MOD_DISPLAY_X + 20, MOD_DISPLAY_Y, 5 + (1 * 6), 11, PIXEL_ON, NORM);
+ draw_string(MOD_DISPLAY_X + 23, MOD_DISPLAY_Y + 2, "A", PIXEL_OFF, NORM, 0);
+ } else {
+ draw_string(MOD_DISPLAY_X + 23, MOD_DISPLAY_Y + 2, "A", PIXEL_ON, NORM, 0);
+ }
+ if (mods & MOD_LGUI) {
+ draw_rect_filled_soft(MOD_DISPLAY_X + 30, MOD_DISPLAY_Y, 5 + (1 * 6), 11, PIXEL_ON, NORM);
+ draw_string(MOD_DISPLAY_X + 33, MOD_DISPLAY_Y + 2, "G", PIXEL_OFF, NORM, 0);
+ } else {
+ draw_string(MOD_DISPLAY_X + 33, MOD_DISPLAY_Y + 2, "G", PIXEL_ON, NORM, 0);
+ }
+
+/* Lock display is 23 x 32 */
+#define LOCK_DISPLAY_X 100
+#define LOCK_DISPLAY_Y 0
+
+ if (led_numlock == true) {
+ draw_rect_filled_soft(LOCK_DISPLAY_X, LOCK_DISPLAY_Y, 5 + (3 * 6), 9, PIXEL_ON, NORM);
+ draw_string(LOCK_DISPLAY_X + 3, LOCK_DISPLAY_Y + 1, "NUM", PIXEL_OFF, NORM, 0);
+ } else if (led_numlock == false) {
+ draw_string(LOCK_DISPLAY_X + 3, LOCK_DISPLAY_Y + 1, "NUM", PIXEL_ON, NORM, 0);
+ }
+ if (led_capslock == true) {
+ draw_rect_filled_soft(LOCK_DISPLAY_X + 0, LOCK_DISPLAY_Y + 11, 5 + (3 * 6), 9, PIXEL_ON, NORM);
+ draw_string(LOCK_DISPLAY_X + 3, LOCK_DISPLAY_Y + 11 +1, "CAP", PIXEL_OFF, NORM, 0);
+ } else if (led_capslock == false) {
+ draw_string(LOCK_DISPLAY_X + 3, LOCK_DISPLAY_Y + 11 +1, "CAP", PIXEL_ON, NORM, 0);
+ }
+
+ if (led_scrolllock == true) {
+ draw_rect_filled_soft(LOCK_DISPLAY_X + 0, LOCK_DISPLAY_Y + 22, 5 + (3 * 6), 9, PIXEL_ON, NORM);
+ draw_string(LOCK_DISPLAY_X + 3, LOCK_DISPLAY_Y + 22 +1, "SCR", PIXEL_OFF, NORM, 0);
+ } else if (led_scrolllock == false) {
+ draw_string(LOCK_DISPLAY_X + 3, LOCK_DISPLAY_Y + 22 +1, "SCR", PIXEL_ON, NORM, 0);
+ }
+ send_buffer();
+}
+
+void read_host_led_state(void) {
+ uint8_t leds = host_keyboard_leds();
+ if (leds & (1 << USB_LED_NUM_LOCK)) {
+ if (led_numlock == false){
+ led_numlock = true;}
+ } else {
+ if (led_numlock == true){
+ led_numlock = false;}
+ }
+ if (leds & (1 << USB_LED_CAPS_LOCK)) {
+ if (led_capslock == false){
+ led_capslock = true;}
+ } else {
+ if (led_capslock == true){
+ led_capslock = false;}
+ }
+ if (leds & (1 << USB_LED_SCROLL_LOCK)) {
+ if (led_scrolllock == false){
+ led_scrolllock = true;}
+ } else {
+ if (led_scrolllock == true){
+ led_scrolllock = false;}
+ }
+}
+
+uint32_t layer_state_set_kb(uint32_t state) {
+ state = layer_state_set_user(state);
+ layer = biton32(state);
+ queue_for_send = true;
+ return state;
+}
+
+bool process_record_kb(uint16_t keycode, keyrecord_t *record) {
+ queue_for_send = true;
+ return process_record_user(keycode, record);
+}
+
+void encoder_update_kb(uint8_t index, bool clockwise) {
+ encoder_value = (encoder_value + (clockwise ? 1 : -1)) % 64;
+ queue_for_send = true;
+}
+
+#endif
+
+void matrix_init_kb(void) {
+#ifdef DRV2605L
+ DRV_init();
+#endif
+ queue_for_send = true;
+ matrix_init_user();
+}
+
+void matrix_scan_kb(void) {
+
+if (queue_for_send) {
+ #ifdef DRV2605L
+ DRV_EFFECT play_eff = strong_click;
+ DRV_pulse(play_eff);
+ #endif
+#ifdef QWIIC_MICRO_OLED_ENABLE
+ read_host_led_state();
+ draw_ui();
+#endif
+ queue_for_send = false;
+ }
+#ifdef QWIIC_MICRO_OLED_ENABLE
+ if (timer_elapsed(last_flush) > ScreenOffInterval) {
+ send_command(DISPLAYOFF); /* 0xAE */
+ }
+#endif
+ matrix_scan_user();
+}
diff --git a/keyboards/hadron/ver3/ver3.h b/keyboards/hadron/ver3/ver3.h
new file mode 100644
index 0000000000..516f7b9a1b
--- /dev/null
+++ b/keyboards/hadron/ver3/ver3.h
@@ -0,0 +1,21 @@
+/* Copyright 2018 Jack Humbert <jack.humb@gmail.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+#ifndef VER3_H
+#define VER3_H
+
+#include "hadron.h"
+
+#endif \ No newline at end of file