diff options
Diffstat (limited to 'drivers/chibios')
| -rw-r--r-- | drivers/chibios/serial_usart.c | 13 | ||||
| -rw-r--r-- | drivers/chibios/uart.c | 50 | ||||
| -rw-r--r-- | drivers/chibios/uart.h | 77 | ||||
| -rw-r--r-- | drivers/chibios/usbpd_stm32g4.c | 76 |
4 files changed, 211 insertions, 5 deletions
diff --git a/drivers/chibios/serial_usart.c b/drivers/chibios/serial_usart.c index a3e21f90bc..7c81b16464 100644 --- a/drivers/chibios/serial_usart.c +++ b/drivers/chibios/serial_usart.c @@ -58,7 +58,10 @@ # error invalid SELECT_SOFT_SERIAL_SPEED value #endif -#define TIMEOUT 100 +#ifndef SERIAL_USART_TIMEOUT +# define SERIAL_USART_TIMEOUT 100 +#endif + #define HANDSHAKE_MAGIC 7 static inline msg_t sdWriteHalfDuplex(SerialDriver* driver, uint8_t* data, uint8_t size) { @@ -201,21 +204,21 @@ int soft_serial_transaction(int index) { sdClear(&SERIAL_USART_DRIVER); // First chunk is always transaction id - sdWriteTimeout(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index), TIME_MS2I(TIMEOUT)); + sdWriteTimeout(&SERIAL_USART_DRIVER, &sstd_index, sizeof(sstd_index), TIME_MS2I(SERIAL_USART_TIMEOUT)); uint8_t sstd_index_shake = 0xFF; // Which we always read back first so that we can error out correctly // - due to the half duplex limitations on return codes, we always have to read *something* // - without the read, write only transactions *always* succeed, even during the boot process where the slave is not ready - res = sdReadTimeout(&SERIAL_USART_DRIVER, &sstd_index_shake, sizeof(sstd_index_shake), TIME_MS2I(TIMEOUT)); + res = sdReadTimeout(&SERIAL_USART_DRIVER, &sstd_index_shake, sizeof(sstd_index_shake), TIME_MS2I(SERIAL_USART_TIMEOUT)); if (res < 0 || (sstd_index_shake != (sstd_index ^ HANDSHAKE_MAGIC))) { dprintf("serial::usart_shake NO_RESPONSE\n"); return TRANSACTION_NO_RESPONSE; } if (trans->initiator2target_buffer_size) { - res = sdWriteTimeout(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size, TIME_MS2I(TIMEOUT)); + res = sdWriteTimeout(&SERIAL_USART_DRIVER, trans->initiator2target_buffer, trans->initiator2target_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT)); if (res < 0) { dprintf("serial::usart_transmit NO_RESPONSE\n"); return TRANSACTION_NO_RESPONSE; @@ -223,7 +226,7 @@ int soft_serial_transaction(int index) { } if (trans->target2initiator_buffer_size) { - res = sdReadTimeout(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size, TIME_MS2I(TIMEOUT)); + res = sdReadTimeout(&SERIAL_USART_DRIVER, trans->target2initiator_buffer, trans->target2initiator_buffer_size, TIME_MS2I(SERIAL_USART_TIMEOUT)); if (res < 0) { dprintf("serial::usart_receive NO_RESPONSE\n"); return TRANSACTION_NO_RESPONSE; diff --git a/drivers/chibios/uart.c b/drivers/chibios/uart.c new file mode 100644 index 0000000000..030335b342 --- /dev/null +++ b/drivers/chibios/uart.c @@ -0,0 +1,50 @@ +/* Copyright 2021 + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <https://www.gnu.org/licenses/>. + */ + +#include "uart.h" + +#include "quantum.h" + +static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3}; + +void uart_init(uint32_t baud) { + static bool is_initialised = false; + + if (!is_initialised) { + is_initialised = true; + + serialConfig.speed = baud; + +#if defined(USE_GPIOV1) + palSetLineMode(SD1_TX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); + palSetLineMode(SD1_RX_PIN, PAL_MODE_STM32_ALTERNATE_OPENDRAIN); +#else + palSetLineMode(SD1_TX_PIN, PAL_MODE_ALTERNATE(SD1_TX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); + palSetLineMode(SD1_RX_PIN, PAL_MODE_ALTERNATE(SD1_RX_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN); +#endif + sdStart(&SERIAL_DRIVER, &serialConfig); + } +} + +void uart_putchar(uint8_t c) { sdPut(&SERIAL_DRIVER, c); } + +uint8_t uart_getchar(void) { + msg_t res = sdGet(&SERIAL_DRIVER); + + return (uint8_t)res; +} + +bool uart_available(void) { return !sdGetWouldBlock(&SERIAL_DRIVER); } diff --git a/drivers/chibios/uart.h b/drivers/chibios/uart.h new file mode 100644 index 0000000000..b4e20e9fd3 --- /dev/null +++ b/drivers/chibios/uart.h @@ -0,0 +1,77 @@ +/* Copyright 2021 + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 3 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <https://www.gnu.org/licenses/>. + */ + +#pragma once + +#include <stdint.h> + +#include <hal.h> + +#ifndef SERIAL_DRIVER +# define SERIAL_DRIVER SD1 +#endif + +#ifndef SD1_TX_PIN +# define SD1_TX_PIN A9 +#endif + +#ifndef SD1_TX_PAL_MODE +# define SD1_TX_PAL_MODE 7 +#endif + +#ifndef SD1_RX_PIN +# define SD1_RX_PIN A10 +#endif + +#ifndef SD1_RX_PAL_MODE +# define SD1_RX_PAL_MODE 7 +#endif + +#ifndef SD1_CTS_PIN +# define SD1_CTS_PIN A11 +#endif + +#ifndef SD1_CTS_PAL_MODE +# define SD1_CTS_PAL_MODE 7 +#endif + +#ifndef SD1_RTS_PIN +# define SD1_RTS_PIN A12 +#endif + +#ifndef SD1_RTS_PAL_MODE +# define SD1_RTS_PAL_MODE 7 +#endif + +#ifndef SD1_CR1 +# define SD1_CR1 0 +#endif + +#ifndef SD1_CR2 +# define SD1_CR2 0 +#endif + +#ifndef SD1_CR3 +# define SD1_CR3 0 +#endif + +void uart_init(uint32_t baud); + +void uart_putchar(uint8_t c); + +uint8_t uart_getchar(void); + +bool uart_available(void); diff --git a/drivers/chibios/usbpd_stm32g4.c b/drivers/chibios/usbpd_stm32g4.c new file mode 100644 index 0000000000..f16ca8aeae --- /dev/null +++ b/drivers/chibios/usbpd_stm32g4.c @@ -0,0 +1,76 @@ +/* Copyright 2021 Nick Brassel (@tzarc) + * + * This program is free software: you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation, either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#include <quantum.h> + +#ifndef USBPD_UCPD1_CFG1 +# define USBPD_UCPD1_CFG1 (UCPD_CFG1_PSC_UCPDCLK_0 | UCPD_CFG1_TRANSWIN_3 | UCPD_CFG1_IFRGAP_4 | UCPD_CFG1_HBITCLKDIV_4) +#endif // USBPD_UCPD1_CFG1 + +// Initialises the USBPD subsystem +__attribute__((weak)) void usbpd_init(void) { + // Disable dead-battery signals + PWR->CR3 |= PWR_CR3_UCPD_DBDIS; + // Enable the clock for the UCPD1 peripheral + RCC->APB1ENR2 |= RCC_APB1ENR2_UCPD1EN; + + // Copy the existing value + uint32_t CFG1 = UCPD1->CFG1; + // Force-disable UCPD1 before configuring + CFG1 &= ~UCPD_CFG1_UCPDEN; + // Configure UCPD1 + CFG1 = USBPD_UCPD1_CFG1; + // Apply the changes + UCPD1->CFG1 = CFG1; + // Enable UCPD1 + UCPD1->CFG1 |= UCPD_CFG1_UCPDEN; + + // Copy the existing value + uint32_t CR = UCPD1->CR; + // Clear out ANASUBMODE (irrelevant as a sink device) + CR &= ~UCPD_CR_ANASUBMODE_Msk; + // Advertise our capabilities as a sink, with both CC lines enabled + CR |= UCPD_CR_ANAMODE | UCPD_CR_CCENABLE_Msk; + // Apply the changes + UCPD1->CR = CR; +} + +// Gets the current state of the USBPD allowance +__attribute__((weak)) usbpd_allowance_t usbpd_get_allowance(void) { + uint32_t CR = UCPD1->CR; + + int ucpd_enabled = (UCPD1->CFG1 & UCPD_CFG1_UCPDEN_Msk) >> UCPD_CFG1_UCPDEN_Pos; + int anamode = (CR & UCPD_CR_ANAMODE_Msk) >> UCPD_CR_ANAMODE_Pos; + int cc_enabled = (CR & UCPD_CR_CCENABLE_Msk) >> UCPD_CR_CCENABLE_Pos; + + if (ucpd_enabled && anamode && cc_enabled) { + uint32_t SR = UCPD1->SR; + int vstate_cc1 = (SR & UCPD_SR_TYPEC_VSTATE_CC1_Msk) >> UCPD_SR_TYPEC_VSTATE_CC1_Pos; + int vstate_cc2 = (SR & UCPD_SR_TYPEC_VSTATE_CC2_Msk) >> UCPD_SR_TYPEC_VSTATE_CC2_Pos; + int vstate_max = vstate_cc1 > vstate_cc2 ? vstate_cc1 : vstate_cc2; + switch (vstate_max) { + case 0: + case 1: + return USBPD_500MA; // Note that this is 500mA (i.e. max USB 2.0), not 900mA, as we're not using USB 3.1 as a sink device. + case 2: + return USBPD_1500MA; + case 3: + return USBPD_3000MA; + } + } + + return USBPD_500MA; +}
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