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authorFlorian Didron <fdidron@users.noreply.github.com>2023-09-06 20:45:35 +0700
committerGitHub <noreply@github.com>2023-09-06 20:45:35 +0700
commit551d63b98ff95d5920c1477f1cc84475715bc5e6 (patch)
tree719a504b9ca99cbc34421f44bafb20e99a7a4daf /platforms
parentcf87d88fb228d9118480a98c909508adacb64f26 (diff)
feat/voyager (#374)
* feat: tentative fix for keyboard crash during esd testing * feat: adds support for the GD32 voyager * feat: adds voyager's dfu suffix * fix: instability issues over i2c * fix: more robust right side scan * fix: tentative delay after init * Revert "fix: tentative delay after init" This reverts commit b0a6461cf1cef60574eac1647fd14e1fe63a020c. * fix: scan left side in between right scan process * fix: resets matrix + layer state when reconnecting the right side * chore: comments and code cleanup * fix: restore previous control flow * fix: decouple led driver reinit from io expander reinit * feat: reinit led drivers independtly * fix: prevents slamming the led driver over i2c * Revert "fix: prevents slamming the led driver over i2c" This reverts commit 48b8c809ea7a99ad2c3e941b83313787985c95e0. * Revert "feat: reinit led drivers independtly" This reverts commit 6405e6b3673478af1d98244c4df6ab73b95b18e1. * fix: reboot on io expander * fix: wait time after reading the io expander * chore: code cleanup and some refactors. * feat: adds led brightness and status led control over hid * fix: remove stray printf * fix: compilation error on ergodox * fix: gd32 eeprom fix * fix: caps lock crash * fix: soft reset to bootloader key. * chore: move the app address define where it should be * fix: cleanup + debounce default * feat: tentatively set gd32 clock to 98Mhz * feat: realign to latest chibios contrib * chore: points to ZSA's chibios contrib fork --------- Co-authored-by: Florian Didron <0x6664@hey.com>
Diffstat (limited to 'platforms')
-rw-r--r--platforms/chibios/boards/GD32F303C_EVAL/board/board.c58
-rw-r--r--platforms/chibios/boards/GD32F303C_EVAL/board/board.mk11
-rw-r--r--platforms/chibios/boards/GD32F303C_EVAL/configs/board.h169
-rw-r--r--platforms/chibios/boards/GD32F303C_EVAL/configs/config.h9
-rw-r--r--platforms/chibios/boards/GD32F303C_EVAL/configs/mcuconf.h211
-rw-r--r--platforms/chibios/bootloaders/ignition.c54
6 files changed, 512 insertions, 0 deletions
diff --git a/platforms/chibios/boards/GD32F303C_EVAL/board/board.c b/platforms/chibios/boards/GD32F303C_EVAL/board/board.c
new file mode 100644
index 0000000000..e82e1d37ce
--- /dev/null
+++ b/platforms/chibios/boards/GD32F303C_EVAL/board/board.c
@@ -0,0 +1,58 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include <hal.h>
+
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+const PALConfig pal_default_config =
+{
+ {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},
+ {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},
+ {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},
+ {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},
+# if STM32_HAS_GPIOE
+ {VAL_GPIOEODR, VAL_GPIOECRL, VAL_GPIOECRH},
+# endif
+};
+#endif
+
+__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {}
+
+/*
+ * Early initialization code.
+ * This initialization must be performed just after stack setup and before
+ * any other initialization.
+ */
+void __early_init(void) {
+ enter_bootloader_mode_if_requested();
+
+ stm32_clock_init();
+}
+
+/*
+ * Board-specific initialization code.
+ */
+void boardInit(void) {
+ //JTAG-DP Disabled and SW-DP Enabled
+ AFIO->MAPR |= AFIO_MAPR_SWJ_CFG_JTAGDISABLE;
+ //Set backup register DR10 to enter bootloader on reset
+ BKP->DR10 = RTC_BOOTLOADER_FLAG;
+}
diff --git a/platforms/chibios/boards/GD32F303C_EVAL/board/board.mk b/platforms/chibios/boards/GD32F303C_EVAL/board/board.mk
new file mode 100644
index 0000000000..b9a48f105b
--- /dev/null
+++ b/platforms/chibios/boards/GD32F303C_EVAL/board/board.mk
@@ -0,0 +1,11 @@
+# List of all the board related files.
+$(info $(BOARD_PATH))
+BOARDSRC = $(BOARD_PATH)/board/board.c
+
+# Required include directories
+BOARDINC = $(BOARD_PATH)/board
+
+# Shared variables
+ALLCSRC += $(BOARDSRC)
+ALLINC += $(BOARDINC)
+
diff --git a/platforms/chibios/boards/GD32F303C_EVAL/configs/board.h b/platforms/chibios/boards/GD32F303C_EVAL/configs/board.h
new file mode 100644
index 0000000000..69028bbe9e
--- /dev/null
+++ b/platforms/chibios/boards/GD32F303C_EVAL/configs/board.h
@@ -0,0 +1,169 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for a Generic STM32F103 board.
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_GD32EVAL
+#define BOARD_NAME "GENERIC GD32F303 board - ignition bootloader"
+
+/*
+ * Board frequencies.
+ */
+#define STM32_LSECLK 32768
+//#define STM32_HSECLK 8000000
+#define STM32_HSECLK 10800000 // ~ 98Mhz
+
+/*
+ * MCU type, supported types are defined in ./os/hal/platforms/hal_lld.h.
+ */
+#define STM32F103xE
+
+/*
+ * IO pins assignments
+ */
+
+/* on-board */
+
+#define GPIOA_LED 8
+#define GPIOD_OSC_IN 0
+#define GPIOD_OSC_OUT 1
+
+/* In case your board has a "USB enable" hardware
+ controlled by a pin, define it here. (It could be just
+ a 1.5k resistor connected to D+ line.)
+*/
+/*
+#define GPIOB_USB_DISC 10
+*/
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ *
+ * The digits have the following meaning:
+ * 0 - Analog input.
+ * 1 - Push Pull output 10MHz.
+ * 2 - Push Pull output 2MHz.
+ * 3 - Push Pull output 50MHz.
+ * 4 - Digital input.
+ * 5 - Open Drain output 10MHz.
+ * 6 - Open Drain output 2MHz.
+ * 7 - Open Drain output 50MHz.
+ * 8 - Digital input with PullUp or PullDown resistor depending on ODR.
+ * 9 - Alternate Push Pull output 10MHz.
+ * A - Alternate Push Pull output 2MHz.
+ * B - Alternate Push Pull output 50MHz.
+ * C - Reserved.
+ * D - Alternate Open Drain output 10MHz.
+ * E - Alternate Open Drain output 2MHz.
+ * F - Alternate Open Drain output 50MHz.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+
+/*
+ * Port A setup.
+ * Everything input with pull-up except:
+ * PA2 - Alternate output (USART2 TX).
+ * PA3 - Normal input (USART2 RX).
+ * PA9 - Alternate output (USART1 TX).
+ * PA10 - Normal input (USART1 RX).
+ */
+#define VAL_GPIOACRL 0x88884B88 /* PA7...PA0 */
+#define VAL_GPIOACRH 0x888884B8 /* PA15...PA8 */
+#define VAL_GPIOAODR 0xFFFFFFFF
+
+/*
+ * Port B setup.
+ * Everything input with pull-up except:
+ * PB10 - Push Pull output (USB switch).
+ */
+#define VAL_GPIOBCRL 0x88888888 /* PB7...PB0 */
+#define VAL_GPIOBCRH 0x88888388 /* PB15...PB8 */
+#define VAL_GPIOBODR 0xFFFFFFFF
+
+/*
+ * Port C setup.
+ * Everything input with pull-up except:
+ * PC13 - Push Pull output (LED).
+ */
+#define VAL_GPIOCCRL 0x88888888 /* PC7...PC0 */
+#define VAL_GPIOCCRH 0x88388888 /* PC15...PC8 */
+#define VAL_GPIOCODR 0xFFFFFFFF
+
+/*
+ * Port D setup.
+ * Everything input with pull-up except:
+ * PD0 - Normal input (XTAL).
+ * PD1 - Normal input (XTAL).
+ */
+#define VAL_GPIODCRL 0x88888844 /* PD7...PD0 */
+#define VAL_GPIODCRH 0x88888888 /* PD15...PD8 */
+#define VAL_GPIODODR 0xFFFFFFFF
+
+/*
+ * Port E setup.
+ * Everything input with pull-up except:
+ */
+#define VAL_GPIOECRL 0x88888888 /* PE7...PE0 */
+#define VAL_GPIOECRH 0x88888888 /* PE15...PE8 */
+#define VAL_GPIOEODR 0xFFFFFFFF
+
+/*
+ * USB bus activation macro, required by the USB driver.
+ */
+/* The point is that most of the generic STM32F103* boards
+ have a 1.5k resistor connected on one end to the D+ line
+ and on the other end to some pin. Or even a slightly more
+ complicated "USB enable" circuit, controlled by a pin.
+ That should go here.
+
+ However on some boards (e.g. one that I have), there's no
+ such hardware. In which case it's better to not do anything.
+*/
+/*
+#define usb_lld_connect_bus(usbp) palClearPad(GPIOB, GPIOB_USB_DISC)
+*/
+#define usb_lld_connect_bus(usbp) palSetPadMode(GPIOA, 12, PAL_MODE_INPUT);
+
+/*
+ * USB bus de-activation macro, required by the USB driver.
+ */
+/*
+#define usb_lld_disconnect_bus(usbp) palSetPad(GPIOB, GPIOB_USB_DISC)
+*/
+#define usb_lld_disconnect_bus(usbp) \
+ palSetPadMode(GPIOA, 12, PAL_MODE_OUTPUT_PUSHPULL); \
+ palClearPad(GPIOA, 12);
+
+#if !defined(_FROM_ASM_)
+# ifdef __cplusplus
+extern "C" {
+# endif
+void boardInit(void);
+# ifdef __cplusplus
+}
+# endif
+#endif /* _FROM_ASM_ */
+
+#endif /* _BOARD_H_ */
diff --git a/platforms/chibios/boards/GD32F303C_EVAL/configs/config.h b/platforms/chibios/boards/GD32F303C_EVAL/configs/config.h
new file mode 100644
index 0000000000..ef22c6a1ee
--- /dev/null
+++ b/platforms/chibios/boards/GD32F303C_EVAL/configs/config.h
@@ -0,0 +1,9 @@
+// Copyright 2022 Nick Brassel (@tzarc)
+// SPDX-License-Identifier: GPL-2.0-or-later
+#pragma once
+
+// Value to place in RTC backup register 10 for persistent bootloader mode
+#define RTC_BOOTLOADER_FLAG 0x424C
+
+// Value to place in RTC backup register 10 for instant reboot mode
+#define RTC_BOOTLOADER_JUST_UPLOADED 0x424D \ No newline at end of file
diff --git a/platforms/chibios/boards/GD32F303C_EVAL/configs/mcuconf.h b/platforms/chibios/boards/GD32F303C_EVAL/configs/mcuconf.h
new file mode 100644
index 0000000000..c6e31e91af
--- /dev/null
+++ b/platforms/chibios/boards/GD32F303C_EVAL/configs/mcuconf.h
@@ -0,0 +1,211 @@
+/*
+ ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/* The GD32F303 is pretty much an STM32F103 in disguise. It requires a patch for i2c that needs to be available in CHIBIOS-CONTRIB */
+#ifndef _MCUCONF_H_
+#define _MCUCONF_H_
+
+#define MCU_STM32
+#define STM32F103_MCUCONF
+
+/*
+ * STM32F103 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0 Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3 Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_NO_INIT FALSE
+#define STM32_HSI_ENABLED TRUE
+#define STM32_LSI_ENABLED FALSE
+#define STM32_HSE_ENABLED TRUE
+#define STM32_LSE_ENABLED FALSE
+#define STM32_SW STM32_SW_PLL
+#define STM32_PLLSRC STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE 9
+#define STM32_HPRE STM32_HPRE_DIV1
+#define STM32_PPRE1 STM32_PPRE1_DIV2
+#define STM32_PPRE2 STM32_PPRE2_DIV2
+#define STM32_ADCPRE STM32_ADCPRE_DIV4
+#define STM32_USB_CLOCK_REQUIRED TRUE
+#define STM32_USBPRE STM32_USBPRE_DIV1P5
+#define STM32_MCOSEL STM32_MCOSEL_NOCLOCK
+#define STM32_RTCSEL STM32_RTCSEL_HSEDIV
+#define STM32_PVD_ENABLE FALSE
+#define STM32_PLS STM32_PLS_LEV0
+
+/*
+ * ADC driver system settings.
+ */
+#define STM32_ADC_USE_ADC1 FALSE
+#define STM32_ADC_ADC1_DMA_PRIORITY 2
+#define STM32_ADC_ADC1_IRQ_PRIORITY 6
+
+/*
+ * CAN driver system settings.
+ */
+#define STM32_CAN_USE_CAN1 FALSE
+#define STM32_CAN_CAN1_IRQ_PRIORITY 11
+
+/*
+ * EXT driver system settings.
+ */
+#define STM32_EXT_EXTI0_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI1_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI2_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI3_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI4_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+
+/*
+ * GPT driver system settings.
+ */
+#define STM32_GPT_USE_TIM1 FALSE
+#define STM32_GPT_USE_TIM2 FALSE
+#define STM32_GPT_USE_TIM3 FALSE
+#define STM32_GPT_USE_TIM4 FALSE
+#define STM32_GPT_USE_TIM5 FALSE
+#define STM32_GPT_USE_TIM8 FALSE
+#define STM32_GPT_TIM1_IRQ_PRIORITY 7
+#define STM32_GPT_TIM2_IRQ_PRIORITY 7
+#define STM32_GPT_TIM3_IRQ_PRIORITY 7
+#define STM32_GPT_TIM4_IRQ_PRIORITY 7
+#define STM32_GPT_TIM5_IRQ_PRIORITY 7
+#define STM32_GPT_TIM8_IRQ_PRIORITY 7
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1 FALSE
+#define STM32_I2C_USE_I2C2 FALSE
+#define STM32_I2C_BUSY_TIMEOUT 50
+#define STM32_I2C_I2C1_IRQ_PRIORITY 5
+#define STM32_I2C_I2C2_IRQ_PRIORITY 5
+#define STM32_I2C_I2C1_DMA_PRIORITY 3
+#define STM32_I2C_I2C2_DMA_PRIORITY 3
+#define STM32_I2C_DMA_ERROR_HOOK(i2cp) osalSysHalt("DMA failure")
+
+/*
+ * ICU driver system settings.
+ */
+#define STM32_ICU_USE_TIM1 FALSE
+#define STM32_ICU_USE_TIM2 FALSE
+#define STM32_ICU_USE_TIM3 FALSE
+#define STM32_ICU_USE_TIM4 FALSE
+#define STM32_ICU_USE_TIM5 FALSE
+#define STM32_ICU_USE_TIM8 FALSE
+#define STM32_ICU_TIM1_IRQ_PRIORITY 7
+#define STM32_ICU_TIM2_IRQ_PRIORITY 7
+#define STM32_ICU_TIM3_IRQ_PRIORITY 7
+#define STM32_ICU_TIM4_IRQ_PRIORITY 7
+#define STM32_ICU_TIM5_IRQ_PRIORITY 7
+#define STM32_ICU_TIM8_IRQ_PRIORITY 7
+
+/*
+ * PWM driver system settings.
+ */
+#define STM32_PWM_USE_ADVANCED FALSE
+#define STM32_PWM_USE_TIM1 FALSE
+#define STM32_PWM_USE_TIM2 FALSE
+#define STM32_PWM_USE_TIM3 FALSE
+#define STM32_PWM_USE_TIM4 FALSE
+#define STM32_PWM_USE_TIM5 FALSE
+#define STM32_PWM_USE_TIM8 FALSE
+#define STM32_PWM_TIM1_IRQ_PRIORITY 7
+#define STM32_PWM_TIM2_IRQ_PRIORITY 7
+#define STM32_PWM_TIM3_IRQ_PRIORITY 7
+#define STM32_PWM_TIM4_IRQ_PRIORITY 7
+#define STM32_PWM_TIM5_IRQ_PRIORITY 7
+#define STM32_PWM_TIM8_IRQ_PRIORITY 7
+
+/*
+ * RTC driver system settings.
+ */
+#define STM32_RTC_IRQ_PRIORITY 15
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM32_SERIAL_USE_USART1 FALSE
+#define STM32_SERIAL_USE_USART2 FALSE
+#define STM32_SERIAL_USE_USART3 FALSE
+#define STM32_SERIAL_USE_UART4 FALSE
+#define STM32_SERIAL_USE_UART5 FALSE
+#define STM32_SERIAL_USART1_PRIORITY 12
+#define STM32_SERIAL_USART2_PRIORITY 12
+#define STM32_SERIAL_USART3_PRIORITY 12
+#define STM32_SERIAL_UART4_PRIORITY 12
+#define STM32_SERIAL_UART5_PRIORITY 12
+
+/*
+ * SPI driver system settings.
+ */
+#define STM32_SPI_USE_SPI1 FALSE
+#define STM32_SPI_USE_SPI2 TRUE
+#define STM32_SPI_USE_SPI3 FALSE
+#define STM32_SPI_SPI1_DMA_PRIORITY 1
+#define STM32_SPI_SPI2_DMA_PRIORITY 1
+#define STM32_SPI_SPI3_DMA_PRIORITY 1
+#define STM32_SPI_SPI1_IRQ_PRIORITY 10
+#define STM32_SPI_SPI2_IRQ_PRIORITY 10
+#define STM32_SPI_SPI3_IRQ_PRIORITY 10
+#define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure")
+
+/*
+ * ST driver system settings.
+ */
+#define STM32_ST_IRQ_PRIORITY 8
+#define STM32_ST_USE_TIMER 2
+
+/*
+ * UART driver system settings.
+ */
+#define STM32_UART_USE_USART1 FALSE
+#define STM32_UART_USE_USART2 FALSE
+#define STM32_UART_USE_USART3 FALSE
+#define STM32_UART_USART1_IRQ_PRIORITY 12
+#define STM32_UART_USART2_IRQ_PRIORITY 12
+#define STM32_UART_USART3_IRQ_PRIORITY 12
+#define STM32_UART_USART1_DMA_PRIORITY 0
+#define STM32_UART_USART2_DMA_PRIORITY 0
+#define STM32_UART_USART3_DMA_PRIORITY 0
+#define STM32_UART_DMA_ERROR_HOOK(uartp) osalSysHalt("DMA failure")
+
+/*
+ * USB driver system settings.
+ */
+#define STM32_USB_USE_USB1 TRUE
+#define STM32_USB_LOW_POWER_ON_SUSPEND FALSE
+#define STM32_USB_USB1_HP_IRQ_PRIORITY 13
+#define STM32_USB_USB1_LP_IRQ_PRIORITY 14
+
+#endif /* _MCUCONF_H_ */
diff --git a/platforms/chibios/bootloaders/ignition.c b/platforms/chibios/bootloaders/ignition.c
new file mode 100644
index 0000000000..00d55db2b8
--- /dev/null
+++ b/platforms/chibios/bootloaders/ignition.c
@@ -0,0 +1,54 @@
+/* Copyright 2021 QMK
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include "bootloader.h"
+
+#include <ch.h>
+#include <hal.h>
+#include "wait.h"
+#include "gpio.h"
+
+#define APP_ADDRESS 0x08002000
+
+__attribute__((weak)) void bootloader_jump(void) {
+ // The ignition bootloader is checking for a high signal on A8 for 100ms when powering on the board.
+ // Setting both A8 and A9 high will charge the capacitor quickly.
+ // Setting A9 low before reset will cause the capacitor to discharge
+ // thus making the bootloder unlikely to trigger twice between power cycles.
+ setPinOutputPushPull(A9);
+ setPinOutputPushPull(A8);
+ writePinHigh(A9);
+ writePinHigh(A8);
+ wait_ms(500);
+ writePinLow(A9);
+
+ NVIC_SystemReset();
+}
+
+__attribute__((weak)) void mcu_reset(void) {
+ // When resetting the MCU, we want to jump to the application.
+ SCB->AIRCR = APP_ADDRESS & 0xFFFF;
+
+ // Set the stack pointer to the applications stack pointer
+ __asm__ volatile("msr msp, %0" ::"g"(*(volatile uint32_t *)APP_ADDRESS));
+
+ // Jump to the application
+ (*(void (**)())(APP_ADDRESS + 4))();
+ while (1)
+ ;
+}
+
+__attribute__((weak)) void enter_bootloader_mode_if_requested(void) {} \ No newline at end of file