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authorSergey Vlasov <sigprof@gmail.com>2020-08-25 12:02:32 +0300
committerDrashna Jael're <drashna@live.com>2020-09-30 03:42:50 -0700
commit7b4d9fc7c14b83106cb1862ca3951c8285f4d6e2 (patch)
tree31bf83a7c729266c28a4cd7dfcdbe75823a89993 /drivers/chibios
parentd5f4fc7c2e61ccbf56ddd23be1ed14052c2f8dc0 (diff)
Fix DMA stream ID calculation in ws2812_pwm (#10008)
Some STM32 chips have STM32_DMA1_STREAM1 as the first DMA stream, others (F4xx, F7xx, H7xx) have STM32_DMA1_STREAM0. Instead of those names, use STM32_DMA_STREAM(0), which should always give the first stm32_dma_stream_t structure in the DMA streams array, so that the stream ID would be calculated correctly.
Diffstat (limited to 'drivers/chibios')
-rw-r--r--drivers/chibios/ws2812_pwm.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/chibios/ws2812_pwm.c b/drivers/chibios/ws2812_pwm.c
index d93fa24735..bfb44ce4a4 100644
--- a/drivers/chibios/ws2812_pwm.c
+++ b/drivers/chibios/ws2812_pwm.c
@@ -180,7 +180,7 @@ void ws2812_init(void) {
// Configure DMA
// dmaInit(); // Joe added this
- dmaStreamAlloc(WS2812_DMA_STREAM - STM32_DMA1_STREAM1, 10, NULL, NULL);
+ dmaStreamAlloc(WS2812_DMA_STREAM - STM32_DMA_STREAM(0), 10, NULL, NULL);
dmaStreamSetPeripheral(WS2812_DMA_STREAM, &(WS2812_PWM_DRIVER.tim->CCR[WS2812_PWM_CHANNEL - 1])); // Ziel ist der An-Zeit im Cap-Comp-Register
dmaStreamSetMemory0(WS2812_DMA_STREAM, ws2812_frame_buffer);
dmaStreamSetTransactionSize(WS2812_DMA_STREAM, WS2812_BIT_N);