summaryrefslogtreecommitdiff
path: root/drivers/arm/i2c_master.h
diff options
context:
space:
mode:
authorskullY <skullydazed@gmail.com>2019-08-30 11:19:03 -0700
committerskullydazed <skullydazed@users.noreply.github.com>2019-08-30 15:01:52 -0700
commitb624f32f944acdc59dcb130674c09090c5c404cb (patch)
treebc13adbba137d122d9a2c2fb2fafcbb08ac10e25 /drivers/arm/i2c_master.h
parent61af76a10d00aba185b8338604171de490a13e3b (diff)
clang-format changes
Diffstat (limited to 'drivers/arm/i2c_master.h')
-rw-r--r--drivers/arm/i2c_master.h91
1 files changed, 45 insertions, 46 deletions
diff --git a/drivers/arm/i2c_master.h b/drivers/arm/i2c_master.h
index c8afa31e28..b40fa0a910 100644
--- a/drivers/arm/i2c_master.h
+++ b/drivers/arm/i2c_master.h
@@ -27,84 +27,83 @@
#include "ch.h"
#include <hal.h>
-
#if defined(STM32F1XX) || defined(STM32F1xx) || defined(STM32F2xx) || defined(STM32F4xx) || defined(STM32L0xx) || defined(STM32L1xx)
- #define USE_I2CV1
+# define USE_I2CV1
#endif
#ifdef I2C1_BANK
- #define I2C1_SCL_BANK I2C1_BANK
- #define I2C1_SDA_BANK I2C1_BANK
+# define I2C1_SCL_BANK I2C1_BANK
+# define I2C1_SDA_BANK I2C1_BANK
#endif
#ifndef I2C1_SCL_BANK
- #define I2C1_SCL_BANK GPIOB
+# define I2C1_SCL_BANK GPIOB
#endif
#ifndef I2C1_SDA_BANK
- #define I2C1_SDA_BANK GPIOB
+# define I2C1_SDA_BANK GPIOB
#endif
#ifndef I2C1_SCL
- #define I2C1_SCL 6
+# define I2C1_SCL 6
#endif
#ifndef I2C1_SDA
- #define I2C1_SDA 7
+# define I2C1_SDA 7
#endif
#ifdef USE_I2CV1
- #ifndef I2C1_OPMODE
- #define I2C1_OPMODE OPMODE_I2C
- #endif
- #ifndef I2C1_CLOCK_SPEED
- #define I2C1_CLOCK_SPEED 100000 /* 400000 */
- #endif
- #ifndef I2C1_DUTY_CYCLE
- #define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
- #endif
+# ifndef I2C1_OPMODE
+# define I2C1_OPMODE OPMODE_I2C
+# endif
+# ifndef I2C1_CLOCK_SPEED
+# define I2C1_CLOCK_SPEED 100000 /* 400000 */
+# endif
+# ifndef I2C1_DUTY_CYCLE
+# define I2C1_DUTY_CYCLE STD_DUTY_CYCLE /* FAST_DUTY_CYCLE_2 */
+# endif
#else
- // The default PAL alternate modes are used to signal that the pins are used for I2C
- #ifndef I2C1_SCL_PAL_MODE
- #define I2C1_SCL_PAL_MODE 4
- #endif
- #ifndef I2C1_SDA_PAL_MODE
- #define I2C1_SDA_PAL_MODE 4
- #endif
+// The default PAL alternate modes are used to signal that the pins are used for I2C
+# ifndef I2C1_SCL_PAL_MODE
+# define I2C1_SCL_PAL_MODE 4
+# endif
+# ifndef I2C1_SDA_PAL_MODE
+# define I2C1_SDA_PAL_MODE 4
+# endif
- // The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
- // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
- #ifndef I2C1_TIMINGR_PRESC
- #define I2C1_TIMINGR_PRESC 15U
- #endif
- #ifndef I2C1_TIMINGR_SCLDEL
- #define I2C1_TIMINGR_SCLDEL 4U
- #endif
- #ifndef I2C1_TIMINGR_SDADEL
- #define I2C1_TIMINGR_SDADEL 2U
- #endif
- #ifndef I2C1_TIMINGR_SCLH
- #define I2C1_TIMINGR_SCLH 15U
- #endif
- #ifndef I2C1_TIMINGR_SCLL
- #define I2C1_TIMINGR_SCLL 21U
- #endif
+// The default timing values below configures the I2C clock to 400khz assuming a 72Mhz clock
+// For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
+# ifndef I2C1_TIMINGR_PRESC
+# define I2C1_TIMINGR_PRESC 15U
+# endif
+# ifndef I2C1_TIMINGR_SCLDEL
+# define I2C1_TIMINGR_SCLDEL 4U
+# endif
+# ifndef I2C1_TIMINGR_SDADEL
+# define I2C1_TIMINGR_SDADEL 2U
+# endif
+# ifndef I2C1_TIMINGR_SCLH
+# define I2C1_TIMINGR_SCLH 15U
+# endif
+# ifndef I2C1_TIMINGR_SCLL
+# define I2C1_TIMINGR_SCLL 21U
+# endif
#endif
#ifndef I2C_DRIVER
- #define I2C_DRIVER I2CD1
+# define I2C_DRIVER I2CD1
#endif
typedef int16_t i2c_status_t;
#define I2C_STATUS_SUCCESS (0)
-#define I2C_STATUS_ERROR (-1)
+#define I2C_STATUS_ERROR (-1)
#define I2C_STATUS_TIMEOUT (-2)
-void i2c_init(void);
+void i2c_init(void);
i2c_status_t i2c_start(uint8_t address);
i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout);
-i2c_status_t i2c_transmit_receive(uint8_t address, uint8_t * tx_body, uint16_t tx_length, uint8_t * rx_body, uint16_t rx_length);
+i2c_status_t i2c_transmit_receive(uint8_t address, uint8_t* tx_body, uint16_t tx_length, uint8_t* rx_body, uint16_t rx_length);
i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout);
i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout);
-void i2c_stop(void);
+void i2c_stop(void);