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authorJames Young <xxiinophobia@yahoo.com>2020-02-29 12:00:00 -0800
committerFlorian Didron <fdidron@users.noreply.github.com>2020-06-12 17:00:27 +0900
commitf01c45ef54039366b666c28747fd57136d81c472 (patch)
treea09c6a4e1f7f1b447fc508f4ca542d2640443e71 /drivers/arm/i2c_master.c
parentae8641748e4b2adb5b4f091027975e3884e325c9 (diff)
2020 February 29 Breaking Changes Update (#8064)
Diffstat (limited to 'drivers/arm/i2c_master.c')
-rw-r--r--drivers/arm/i2c_master.c71
1 files changed, 14 insertions, 57 deletions
diff --git a/drivers/arm/i2c_master.c b/drivers/arm/i2c_master.c
index 744ffb4612..ede915fa4a 100644
--- a/drivers/arm/i2c_master.c
+++ b/drivers/arm/i2c_master.c
@@ -29,12 +29,16 @@
#include <string.h>
#include <hal.h>
+static uint8_t i2c_address;
+
static const I2CConfig i2cconfig = {
#ifdef USE_I2CV1
I2C1_OPMODE,
I2C1_CLOCK_SPEED,
I2C1_DUTY_CYCLE,
#else
+ // This configures the I2C clock to 400khz assuming a 72Mhz clock
+ // For more info : https://www.st.com/en/embedded-software/stsw-stm32126.html
STM32_TIMINGR_PRESC(I2C1_TIMINGR_PRESC) | STM32_TIMINGR_SCLDEL(I2C1_TIMINGR_SCLDEL) | STM32_TIMINGR_SDADEL(I2C1_TIMINGR_SDADEL) | STM32_TIMINGR_SCLH(I2C1_TIMINGR_SCLH) | STM32_TIMINGR_SCLL(I2C1_TIMINGR_SCLL), 0, 0
#endif
};
@@ -64,58 +68,30 @@ __attribute__((weak)) void i2c_init(void) {
palSetPadMode(I2C1_SCL_BANK, I2C1_SCL, PAL_MODE_ALTERNATE(I2C1_SCL_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
palSetPadMode(I2C1_SDA_BANK, I2C1_SDA, PAL_MODE_ALTERNATE(I2C1_SDA_PAL_MODE) | PAL_STM32_OTYPE_OPENDRAIN);
#endif
-
- // i2cInit(); //This is invoked by halInit() so no need to redo it.
}
i2c_status_t i2c_start(uint8_t address) {
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cAcquireBus(&I2C_DRIVER);
-#endif
-
+ i2c_address = address;
i2cStart(&I2C_DRIVER, &i2cconfig);
return I2C_STATUS_SUCCESS;
}
i2c_status_t i2c_transmit(uint8_t address, const uint8_t* data, uint16_t length, uint16_t timeout) {
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cAcquireBus(&I2C_DRIVER);
-#endif
-
+ i2c_address = address;
i2cStart(&I2C_DRIVER, &i2cconfig);
- msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (address >> 1), data, length, 0, 0, MS2ST(timeout));
-
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cReleaseBus(&I2C_DRIVER);
-#endif
-
+ msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, 0, 0, TIME_MS2I(timeout));
return chibios_to_qmk(&status);
}
i2c_status_t i2c_receive(uint8_t address, uint8_t* data, uint16_t length, uint16_t timeout) {
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cAcquireBus(&I2C_DRIVER);
-#endif
-
+ i2c_address = address;
i2cStart(&I2C_DRIVER, &i2cconfig);
- msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (address >> 1), data, length, MS2ST(timeout));
-
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cReleaseBus(&I2C_DRIVER);
-#endif
-
+ msg_t status = i2cMasterReceiveTimeout(&I2C_DRIVER, (i2c_address >> 1), data, length, TIME_MS2I(timeout));
return chibios_to_qmk(&status);
}
-i2c_status_t i2c_transmit_receive(uint8_t address, uint8_t * tx_body, uint16_t tx_length, uint8_t * rx_body, uint16_t rx_length) {
- return i2cMasterTransmitTimeout(&I2C_DRIVER, address/2, tx_body, tx_length, rx_body, rx_length, MS2ST(100));
-}
-
i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data, uint16_t length, uint16_t timeout) {
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cAcquireBus(&I2C_DRIVER);
-#endif
-
+ i2c_address = devaddr;
i2cStart(&I2C_DRIVER, &i2cconfig);
uint8_t complete_packet[length + 1];
@@ -124,34 +100,15 @@ i2c_status_t i2c_writeReg(uint8_t devaddr, uint8_t regaddr, const uint8_t* data,
}
complete_packet[0] = regaddr;
- msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (devaddr >> 1), complete_packet, length + 1, 0, 0, MS2ST(timeout));
-
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cReleaseBus(&I2C_DRIVER);
-#endif
-
+ msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), complete_packet, length + 1, 0, 0, TIME_MS2I(timeout));
return chibios_to_qmk(&status);
}
i2c_status_t i2c_readReg(uint8_t devaddr, uint8_t regaddr, uint8_t* data, uint16_t length, uint16_t timeout) {
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cAcquireBus(&I2C_DRIVER);
-#endif
-
+ i2c_address = devaddr;
i2cStart(&I2C_DRIVER, &i2cconfig);
- msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (devaddr >> 1), &regaddr, 1, data, length, MS2ST(timeout));
-
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cReleaseBus(&I2C_DRIVER);
-#endif
-
+ msg_t status = i2cMasterTransmitTimeout(&I2C_DRIVER, (i2c_address >> 1), &regaddr, 1, data, length, TIME_MS2I(timeout));
return chibios_to_qmk(&status);
}
-void i2c_stop(void) {
- i2cStop(&I2C_DRIVER);
-
-#if I2C_USE_MUTUAL_EXCLUSION
- i2cReleaseBus(&I2C_DRIVER);
-#endif
-}
+void i2c_stop(void) { i2cStop(&I2C_DRIVER); }