From 44f1bd9b3a9185951c283ceb5eeb2ecc2be72418 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Mon, 7 Mar 2022 21:04:22 +1100 Subject: ChibiOS 21.11.1 update. (#16251) * ChibiOS 21.11.1 update. * `uf2-tinyuf2` => `tinyuf2` * Updated chibios-contrib, fixup preprocessor for tinyuf2 bootloader. * Fixup keychron L433 boards. * Makefile cleanup. * RISC-V build fixes. * Fixup RISC-V build. --- platforms/chibios/drivers/ws2812_spi.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) (limited to 'platforms/chibios/drivers') diff --git a/platforms/chibios/drivers/ws2812_spi.c b/platforms/chibios/drivers/ws2812_spi.c index 76191db165..01d8148875 100644 --- a/platforms/chibios/drivers/ws2812_spi.c +++ b/platforms/chibios/drivers/ws2812_spi.c @@ -139,7 +139,33 @@ void ws2812_init(void) { #endif // WS2812_SPI_SCK_PIN // TODO: more dynamic baudrate - static const SPIConfig spicfg = {WS2812_SPI_BUFFER_MODE, NULL, PAL_PORT(RGB_DI_PIN), PAL_PAD(RGB_DI_PIN), WS2812_SPI_DIVISOR_CR1_BR_X}; + static const SPIConfig spicfg = { +#ifndef HAL_LLD_SELECT_SPI_V2 +// HAL_SPI_V1 +# if SPI_SUPPORTS_CIRCULAR == TRUE + WS2812_SPI_BUFFER_MODE, +# endif + NULL, // end_cb + PAL_PORT(RGB_DI_PIN), + PAL_PAD(RGB_DI_PIN), + WS2812_SPI_DIVISOR_CR1_BR_X, + 0 +#else + // HAL_SPI_V2 +# if SPI_SUPPORTS_CIRCULAR == TRUE + WS2812_SPI_BUFFER_MODE, +# endif +# if SPI_SUPPORTS_SLAVE_MODE == TRUE + false, +# endif + NULL, // data_cb + NULL, // error_cb + PAL_PORT(RGB_DI_PIN), + PAL_PAD(RGB_DI_PIN), + WS2812_SPI_DIVISOR_CR1_BR_X, + 0 +#endif + }; spiAcquireBus(&WS2812_SPI); /* Acquire ownership of the bus. */ spiStart(&WS2812_SPI, &spicfg); /* Setup transfer parameters. */ -- cgit v1.2.3 From 7712a286dccea029785976311433cf8673594f6f Mon Sep 17 00:00:00 2001 From: Stefan Kerkmann Date: Tue, 19 Apr 2022 12:56:16 +0200 Subject: [Core] Use a mutex guard for split shared memory (#16647) --- platforms/chibios/drivers/serial.c | 29 ++++++++++++++++++++--------- platforms/chibios/drivers/serial_usart.c | 10 +++++++++- 2 files changed, 29 insertions(+), 10 deletions(-) (limited to 'platforms/chibios/drivers') diff --git a/platforms/chibios/drivers/serial.c b/platforms/chibios/drivers/serial.c index bb7b3c0554..0cff057d1d 100644 --- a/platforms/chibios/drivers/serial.c +++ b/platforms/chibios/drivers/serial.c @@ -5,6 +5,7 @@ #include "quantum.h" #include "serial.h" #include "wait.h" +#include "synchronization_util.h" #include @@ -86,7 +87,10 @@ static THD_FUNCTION(Thread1, arg) { chRegSetThreadName("blinker"); while (true) { palWaitLineTimeout(SOFT_SERIAL_PIN, TIME_INFINITE); + + split_shared_memory_lock(); interrupt_handler(NULL); + split_shared_memory_unlock(); } } @@ -205,14 +209,9 @@ void interrupt_handler(void *arg) { chSysUnlockFromISR(); } -///////// -// start transaction by initiator -// -// bool soft_serial_transaction(int sstd_index) -// -// this code is very time dependent, so we need to disable interrupts -bool soft_serial_transaction(int sstd_index) { +static inline bool initiate_transaction(uint8_t sstd_index) { if (sstd_index > NUM_TOTAL_TRANSACTIONS) return false; + split_transaction_desc_t *trans = &split_transaction_table[sstd_index]; // TODO: remove extra delay between transactions @@ -239,8 +238,7 @@ bool soft_serial_transaction(int sstd_index) { return false; } - // if the slave is present syncronize with it - + // if the slave is present synchronize with it uint8_t checksum = 0; // send data to the slave serial_write_byte(sstd_index); // first chunk is transaction id @@ -286,3 +284,16 @@ bool soft_serial_transaction(int sstd_index) { chSysUnlock(); return true; } + +///////// +// start transaction by initiator +// +// bool soft_serial_transaction(int sstd_index) +// +// this code is very time dependent, so we need to disable interrupts +bool soft_serial_transaction(int sstd_index) { + split_shared_memory_lock(); + bool result = initiate_transaction((uint8_t)sstd_index); + split_shared_memory_unlock(); + return result; +} diff --git a/platforms/chibios/drivers/serial_usart.c b/platforms/chibios/drivers/serial_usart.c index 85c64214d1..e9fa4af7a3 100644 --- a/platforms/chibios/drivers/serial_usart.c +++ b/platforms/chibios/drivers/serial_usart.c @@ -15,6 +15,7 @@ */ #include "serial_usart.h" +#include "synchronization_util.h" #if defined(SERIAL_USART_CONFIG) static SerialConfig serial_config = SERIAL_USART_CONFIG; @@ -173,6 +174,7 @@ static THD_FUNCTION(SlaveThread, arg) { * Parts of failed transactions or spurious bytes could still be in it. */ usart_clear(); } + split_shared_memory_unlock(); } } @@ -200,6 +202,7 @@ static inline bool react_to_transactions(void) { return false; } + split_shared_memory_lock(); split_transaction_desc_t* trans = &split_transaction_table[sstd_index]; /* Send back the handshake which is XORed as a simple checksum, @@ -254,7 +257,12 @@ bool soft_serial_transaction(int index) { /* Clear the receive queue, to start with a clean slate. * Parts of failed transactions or spurious bytes could still be in it. */ usart_clear(); - return initiate_transaction((uint8_t)index); + + split_shared_memory_lock(); + bool result = initiate_transaction((uint8_t)index); + split_shared_memory_unlock(); + + return result; } /** -- cgit v1.2.3 From 1c7e8b9a9de0f379bad0823e3f0d1c8d9762ea6c Mon Sep 17 00:00:00 2001 From: Joy Lee Date: Mon, 23 May 2022 13:57:24 +0800 Subject: Added support for Wb32fq95 (#16871) --- platforms/chibios/drivers/i2c_master.c | 2 +- platforms/chibios/drivers/spi_master.c | 4 ++-- platforms/chibios/drivers/uart.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) (limited to 'platforms/chibios/drivers') diff --git a/platforms/chibios/drivers/i2c_master.c b/platforms/chibios/drivers/i2c_master.c index d10bdbabc1..21e064b1dc 100644 --- a/platforms/chibios/drivers/i2c_master.c +++ b/platforms/chibios/drivers/i2c_master.c @@ -97,7 +97,7 @@ static const I2CConfig i2cconfig = { I2C1_OPMODE, I2C1_CLOCK_SPEED, I2C1_DUTY_CYCLE, -#elif defined(WB32F3G71xx) +#elif defined(WB32F3G71xx) || defined(WB32FQ95xx) I2C1_OPMODE, I2C1_CLOCK_SPEED, #else diff --git a/platforms/chibios/drivers/spi_master.c b/platforms/chibios/drivers/spi_master.c index 998bace550..ce69e7f0ac 100644 --- a/platforms/chibios/drivers/spi_master.c +++ b/platforms/chibios/drivers/spi_master.c @@ -54,7 +54,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { return false; } -#ifndef WB32F3G71xx +#if !(defined(WB32F3G71xx) || defined(WB32FQ95xx)) uint16_t roundedDivisor = 2; while (roundedDivisor < divisor) { roundedDivisor <<= 1; @@ -138,7 +138,7 @@ bool spi_start(pin_t slavePin, bool lsbFirst, uint8_t mode, uint16_t divisor) { spiConfig.cpr = (roundedDivisor - 1) >> 1; -#elif defined(WB32F3G71xx) +#elif defined(WB32F3G71xx) || defined(WB32FQ95xx) if (!lsbFirst) { osalDbgAssert(lsbFirst != FALSE, "unsupported lsbFirst"); } diff --git a/platforms/chibios/drivers/uart.c b/platforms/chibios/drivers/uart.c index 4884d7024f..396803f33b 100644 --- a/platforms/chibios/drivers/uart.c +++ b/platforms/chibios/drivers/uart.c @@ -18,7 +18,7 @@ #include "quantum.h" -#if defined(WB32F3G71xx) +#if defined(WB32F3G71xx) || defined(WB32FQ95xx) static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_WRDLEN, SD1_STPBIT, SD1_PARITY, SD1_ATFLCT}; #else static SerialConfig serialConfig = {SERIAL_DEFAULT_BITRATE, SD1_CR1, SD1_CR2, SD1_CR3}; -- cgit v1.2.3